stuck-at input faults are considered. Subsequently the fault coverage of spectral fault signatures is analyzed without the stuck-at fault model assumption.
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TABLE VI11 EWERIMENTALRESULTS I1
I Tables with 12 Tests I
14
I 16 I
.383
I .195 I
REFERENCES
I11 D. Comer and R. Sethi, “The complexity of trie index construction,”J. ACM, vol. 24, pp. 428-440, 1977. P I C. R. P. Hartmann, P. K. Varshney, K. G. Mehrotra, and C. L. Gerberich, “Applicationof information theory to the construction of efficient decision trees,” IEEE Trans.Inform Theory, vol. IT-28,no. 4, pp. 565-577, 1982. [31 L. Hyafil and R. L. Rivest, “Constructing optimal binary decision trees is NP-complete,” Inform Processing Lett., vol. 5, pp. 15-17, 1976. I41 B. M. E. Moret, “Decision trees and diagrams,”Comput. Surveys,vol. 14, no. 4, pp. 593-623, 1982. I51 R. W. Payne and D. A. Preece, “Identification keys and diagnostictables: A review,” J. Royal Stat. Soc. (Series A), vol. 143, pp. 253-259, 1980. I61 S. L. Pollack, “Conversion of limited entry decision tables to computer programs,” Commun. ACM, vol. 8, pp. 677-682, 1965. I71 L.I. Press, “Conversion of decision tables to computer programs,” C O ~ UACM, ~ . vol. 8, pp. 385-390, 1965. I81 L. T. Reinwald and R. M. Soland, “Conversion of limited entry decision tables to optimal computer programs 11: Minimum storage requirement,” J. ACM, vol. 14, pp. 742-755, 1967.
Arithmetic Spectrum Applied to Fault Detection for Combinational Networks Klaus D. Heidtmann
A h h e r - A new method is described for the derivation of fault signatures for the detection of faults in single-output combinational networks. The signatures developed do not require exhaustive testing. So they provide substantially less work than syndrome testing or the veri6cation of Rademacher- Walsh spectral coefficients. The technique based on arithmetic spectra is easily implemented using two counters. Index Terms-Arithmetic spectrum, combinational network, fault coverage, fault detection, spectral lhult signature, stuck-at-fault
Manuscript received February 24, 1988; revised October 20, 1988. The author is with the Department of Computer Science, University of Hamburg, Hamburg, Federal Republic of Germany. IEEE Log Number 9038770.
I. INTRODUCTION For a long time arithmetic spectra of Boolean switching functions have been successfully applied to probabilistic problems like reliability analysis or random testing of digital circuits [3], [5], [8], [9]. This gave the idea to use them also for the solution of deterministic problems like fault detection. The last suggestion is the subject of this paper. First multiple stuck-at faults involving only primary input lines are discussed. They represent all possible stuck-at faults in fan-out-free combinational circuits. Then stuck-at faults on internal lines not equivalent to stuck-at input faults are considered. Subsequently the fault coverage of spectral fault signatures is analyzed without the stuck-at fault model assumption. So far the discussion focuses on single-output combinational networks but the results can be extended to the multiple-output case as shown in Section VI. The proposed technique is also applicable for sequential networks, which, during testing, behave as combinational networks, e.g., LSSD [2]. The new approach uses the arithmetic instead of the RademacherWalsh spectrum as was done in related works [6], [7]. The main advantage of the present method is that it requires substantially less computation and test time than the methods discussed in [6], [7], [lo]-[12]. A Rademacher- Walsh coefficient (including the syndrome) is tested by cycling through all 2” input combinations of a circuit with n inputs. This exhaustive technique is only practical for devices up to 25 inputs. With the new method, a coefficient is tested by cycling only through a subset of all input combinations. Hence, the number of selected input combinations is significantly reduced. It is responsible for the test time and results from circuit structure and required fault coverage. Hence, the new method is flexible. Mechanisms for applying these tests in the LSSD environment have been discussed in [l]. The technique proposed is a form of data compression which serves to reduce the volume of the response data at test time. The price which is paid for the reduction in the storage requirements is that some of the knowledge of exact fault location is lost. The derived signatures are short and easily tested using very simple test equipment. The test circuitry could be included on board the chip since the overhead involved is comparatively small. The test procedure requires a highspeed counter cycling at maximum speed through selected subsets of all input combinations. Hence, the network under test is exercised at speed and a number of dynamic errors will be detected [ 101 which are not testable by means of conventional test-set approaches. All things considered, arithmetic spectral coefficients turn out to be a powerful tool for fault detection. 11. ARITHMETIC SPECTRUM OF SWITCHING FUNCTIONS To distinguish clearly between Boolean and numerical (algebraic and arithmetic) computation the (arithmetic) transform of a Boolean switching function is introduced. Then the arithmetic spectrum of switching functions is discussed. Definition 2.1: Let n be the number of circuit inputs and let N = {1,2,. . . ,n } be the set of input subscripts. The empty set is represented by q5 and the cardinality of a set N is represented by # N . The two Boolean values are denoted by the ciphers 0 and 1. Any vector z = { z ~ , z.~ ,,I,,} of Boolean (two-valued, binary, logical) variables z; E {0,1} for i E N is mapped one to one on vector X = {XI,X2,. . . , X, } with numerical variables X , . Each of them takes on the numerical value which has the same name as the Boolean value of z;, i.e., the corresponding values have the same designation but different data types (integer, Boolean). The function F ( X ) whose numerical output values correspond to those of a Boolean switching function f(z)is called (arithmetical) transform of f(z!. In the same way as Boolean expressions describe switching functions, arithmetical expressions represent transforms as shown in Table I. The first four correspondences result from simple truth tables.
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TABLE I BOOLEAN FU"0NS
AND THEIR ARI'IWMETIC SPECTRUM
A=(O,.
The last three refer to inductive reasoning. Definition2.2: Define X J = ( X J , . - . , X i )with X J = 1 if i E J and X ; = 0 if i E N - J, the matrix
.. , O , l )
This is a consequence of the matrix representation
Z = Qn+lA which also yields
F ( x ~= )C a I . and the column vector 2, whose elements are the values of F ( X J ) for all subsets J of N, J 2 N . The integer vector
IgJ
Corollary 2.5: Equation (2-3) implies the following bounds
A = ( a @ , a { l } , a { 2 }a{1,2}, 7 a{3}7 ". l a N ) T
-2"~'
given by
5 a1 5 2'I-l.
The fact that Pn+l is triangular [see (2-l)] illustrates the lower complexity of this method compared to Rademacher- Walsh spectral is called the arithmetic spectrum of the switching function f(x). His coefficients T I [5]-[7]which include Savirs syndrome T @ [ll]. For components, the (arithmetic) spectral coefficients, can be computed all proper subsets J of N, J C N, holds T J # a J and T N = a N . by (2-2)as follows For a detailed discussion of the interrelationship between the different kinds of spectral coefficients see [4]. (2-3) Example 2.6: Consider for instance a parity generator with switching function Lemma 2.3: The matrix Qn+l with
A
Pn+1Z
(2-4) and arithmetical transform is the inverse of Pn+l defined by (2-1). (-2)#'-' xi. The proof by induction is trivial. The multiplication of (2-2) (2-7) K I E N i€I by Qn+l yields the following spectral representation of Boolean switching functions. Theorem2.4: The transform F ( X ) of any Boolean switching So the spectral coefficients of a parity generator are a* = 0 and function f(x) can be written with unique integer coefficients ar as follows for I with 4 C I 2 N . The matrix notation for n = 3 follows
(2-5)
' 0 1 1 -2 1 -2 -2 . 4
'1 0 - 1 1 - 1 0 1 - 1 - 1 0 1 - 1 1 0 .-1 1
0 0 0 0 0 0 0 0 1 0 0 0 1 1 0 0 0 0 1 0 0 0 - 1 1 1 0 - 1 0 1 -1 1 -1 P3
0 0 0 0 0 0 1 -1
0 0 0 0 0 0 0 1
'01 1
0 1 0 0 .1-
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111. STUCK-AT INPUT FAULTS Consider a single-output combinational network with n inputs realizing f ( 2 ) . A stuck-at input fault is a failure which causes the network to behave as if one or more of its n inputs are permanently fixed at 0 or 1. Lemma 3.1: A stuck-at input fault at input i with i E N causes all spectral coefficients a1 with i E I and I N to vanish. Example 3.2: The arithmetical transform of a parity generator with three inputs is given by
c
F7(X) = xl+ x2
+ x3 - 2XlXZ - 2XlX3 - 2 x z x 3
+ 4XlXZX3 which implies a{l) = 1, a{l,2) = a{l,3) = a{2,3} = -2, and ~ { 1 , 2 , 3 ) = 4. In the presence of a stuck-at 0 on input 1 this function reduces with X1 = 0 to F o p ) = x2 This means a!,) = & o f input 1 holds
2
Y
+ x3 - 2X2X3.
= a!1,3)
= ayl,2,3}= 0. For a stuck-at
and ail} = a i l , z = +,3) = 4 1 , 2 , 3 } = 0. Lemma 3.3: I output values depend on values at input i E N, then a coefficient a1 exists with i E I and a1 # 0. The following definitions go back to [6] and [13]. Definition 3.4: A fault is ar-testable, if a1 # a > where a> is the corresponding spectral coefficient of the faulty combinational network. A set S of spectral coefficients is a signature for some set FS of faults iff every fault in FS is al-testable for at least one a i E S. Lemma 3.1 specifies the properties of a signature from spectral coefficients for all stuck-at input faults. Together with Lemma 3.3 it implies the existence of such a signature for any combinational network. Theorem 3.5: For any combinational network, there exists at least one signature of spectral coefficients for all combinations of stuck-at input faults. For nearly all combinational networks, there exist several signatures of spectral coefficients for all combinations of stuck-at input faults. So one can choose between small signatures with high-order coefficients implying high test complexity and larger signatures with low order coefficients resulting in shorter test time. This will be demonstrated by the following example. Example 3.6: Consider the parity generator with switching function f7(z) = zl@zZ@z3and arithmetic spectral coefficients given by (2-8). The smallest signature for all stuck-at input faults is {a{l,z,3}}. It is verified by cycling through all Z3 input combinations and accumulating all output values. The signature with lowest complexity is {atl),a{z},a{3)} which uses only four input combinations, i.e., 000, 001, 010, 100. Other signatures are for instance { a { l ) , a { 2 , 3 } } a{2,3}}. Using (2-8) one can generalize the above result to or a parity generator with n inputs. Its smallest signature is { a ~ with } order 2". This is the same quantity as for a single Rademacher- Walsh coefficient or syndrome. A signature with only linear complexity ( n 1 or 2n if the all zero input is counted n times) consisting of n coefficients is given by {a{,) : i E N } . After the existence of a signature is guaranteed by Theorem 3.5, fault sensitivity results are needed. They show how to find signatures and are given in the last part of this section. Definition 3.7: A combination of stuck-at input faults is characterized by a pair of sets ( l o , 11). The set IO consists of the subscripts for all inputs with a stuck-at 0 faults and 1 1 is related to all stuck-at 1 inputs. Theorem 3.8: A combination of stuck-at input faults (IO,11)is al-testable iff one of the following conditions holds
+
Fig. 1. A simple network with fan-out on an internal line.
Proof: A simple comparison of the coefficients for the correct network [see (2-5)] and for the faulty circuit shows the following. For condition a) the coefficient of the faulty network vanishes (see Lemma 3.1) in contrast to the original coefficient al. In case of b), 11 equals the coefficient of the sum of coefficients a I u J with J the faulty circuit. Corollary 3.9: For a single stuck-at fault on input line i E N it follows that a) stuck-at 0/1 fault is ar-testable for i E I iff a1 # 0, b) stuck-at 1 fault is a1-testable for i E N - I iff aIu{t)# 0, c) stuck-at 0 fault is not ar-testable for i E N - I . IV. INTERNAL STUCK-AT FAULTS For fan-out-free combinational networks, the signatures derived in the previous section detect also all combinations of internal stuck-at faults, because any of them is equivalent to a combination of stuckat input faults. But for all other irredundant networks the following discussion is relevant. Consider an internal line g in a single-output combinational network. Define h ( z , g ( z ) ) = f ( z ) and its arithmetical transform H ( X , G ( X ) ) = F ( X ) , so that g is input n 1 of h. The following definition generalizes this approach to several internal lines. Definition 4.1: For the consideration of t internal lines define X' = (X1,...,Xn,Xn+l,'",Xn+t) and
+
H(X') = F ( X ) with Xn+,= G , ( X ) for i = 1 to t. The (arithmetic) spectral coefficients of F ( X ) are denoted by a1 for I N and those of H(X') by a; for I {1,2,...,n t}. Theorem 4.2: Assume that a combination of stuck-at faults on internal lines is denoted by (IO, 4 ) with IOU 4 = { n 1 , . . . , n t} corresponding to Definition 3.7. This combination of internal stuck-at faults for an irredundant combinational network realizing f ( z ) is ar-testable iff
+
c
+
+
where a> are the coefficients of H(X') given by (4-1). Similar to Theorem 3.8 the proof is a comparison between the corresponding coefficients of the correct and the faulty network. Example 4.3: Consider the network of Fig. 1 (from [6] and [7]) which realizes
with arithmetic representation F ( X ) = XlX2X3
+
x 4
- xzx3x4
and nonzero spectral coefficients a{1,2,3) = a{4) = 1, a{2,3,4) = -1. From Theorem 3.8 follows that the two signatures {a{1,2,3),a{4}} and {ai1,2,3},a{2,3,4)}detect all combinations of stuck-at input faults.
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TABLE I1 S E N S " OF ~ SPECTRAL COEFFICIENTS FOR INTERNAL STUCK-AT FAUL~S
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I -
I +
+
-
+ I
I +
1
Counter
Circuit under Test
for ( x i : icl)
parity
I
bit
Xi =O: irN-l
I
Fig. 2.
b?'zwn Counter
direction
I
The spectral coefficient a1 test structure.
Now the well-known combinatorial formula
$ (:>
I
( m ! j) =
can be applied. Together with a similar argument for the symmetric case of negative k, this yields the desired result. Now this result is applied to a subset of all inputs Xi with i E I. It follows that the number of switching functions with identical coefficient a i results in For internal line g1 = x5 and H ( X , X5) = XlX2X3
+
g2
= 5 6 one obtains 2zn-2r'(
x4x5,
x1 + x4 - x1x4 - xlx6 + xlX4x6 - xZx3x4 + xlxZx3x4 - x 1 x Z x 3 x 4 x 6 , H ( X , x 5 , x 6 ) = x1 - x1x6 + x4x5 - xlX4x5 H(X, x6) =
+
2#'-1+ 2#' a1
)
'
This implies the following fault coverage of a single spectral coefficient. Theorem 5.3: A single spectral coefficient a1 observes
xlx4x5X6-
According to Theorem 4.2 the internal fault coverage of the coefficients which detect also stuck-at input faults is given by Table I1 where + denotes ai-testability and - means not uptestable.
V. GENERALFAULT COVERAGE Frequently combinational networks are subject to faults not covered by the stuck-at fault model, for instance bridge faults. So in this section the model is left for a more general investigation of the fault coverage achieved by arithmetic spectral coefficients and signatures. Definition 5.1: A fault which changes at least one output value of a switching function is called a logical fault. This is observable by a spectral coefficient iff it alters the value of this coefficient. For switching functions, n binary inputs imply 2" input combinations. So the number of different Boolean functions with n inputs equals 2 to the power of 2". The question is how many different functions have an identical coefficient. Lemma 5.2: The number of different switching functions with n inputs and identical spectral coefficient a~ is given by 2" (2n-'+ a N ) .
+
Proof: Define E = {I : I E N and n #I is even} and N and n #I is odd}. From (2-2) follows
+
U = { I :I
F(X') -
ajv = IEE
F(X'). IEU
+
This spectral coefficient is equal to k 2 0 if k j summands of the first and j summands of the second sum equal 1 for 0 5 j 5 2"-' while all other summands vanish. This situation occurs in
(
k" -+l )j
.(27")
cases. So the number of different functions with aN = k is given by
different logical faults of a combinational network with n inputs. Definition 5.4: A spectral signature is called disjoint if the sets of subscripts are painvise disjoint. For instance, the signatures {a{l), a t q , a{3) 1 and { a { ~ )a{2,3) , 1 of Example 3.6 are disjoint while {aI1,2),a{2,3)} is not disjoint. Corollary 5.5: With s = C a r E#I S and s' = #I for subsets S' of S
xaIES,
logical faults are observed by a disjoint signature S. The proof is by Theorem 5.3 together with the combinatorial principle of inclusion-exclusion. Example 5.6: The previous theorem shows that the signature {atl), a i z ) ,a{3)} observes 111 logical faults while {a{l),a{2,3)} increases to 177. The signature { ~ { 1 , 2 , 3 ) } finds all 255 logical faults of the parity generator with three inputs. VI. VERIFICATION OF SPECTRAL SIGNATURES The hardware required to test a network is shown in Fig. 2. It is similar to the test hardware used in [6] except that no Rademacher-Walsh function generator is required. The network is tested by applying all input assignments with z1 E {0,1} for i E I and x, = 0 for i E N - I and determining aI. This means cycling through a subset of all input combinations and accumulating the output values, i.e., adding or subtracting f(z)with respect to the parity bit indicating whether (-l)#'+#J is positive or negative. A deviation from the expected value denotes a fault. This process is repeated once for each additional coefficient in the spectral signature S. In the case of multiple-output circuits, it is desirable to compute and verify only a single signature for all outputs, as opposed to produce and test a separate signature for each output. As discussed in the following section, the tester used for the entire multiple-output network is the weighted sum of the spectral coefficients of each output. For a circuit with m outputs and n inputs the proposed technique reduces the m vectors of length n 1 to one vector of length n m. The weighted sum signature of this method, computed
+
+
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at test time, is a simple counting signature, and can be implemented directly by a counter similar to the single-output case discussed above.
VII. SPACE COMPACTION FOR MULTIPLE-OUTPUT CIRCUITS This section focuses on testing multiple-output circuits in parallel. The approach is to use as a tester a weighted sum of the arithmetic coefficients of each output. The notion of a weighted syndrome sum was generalized to weighted spectral sums in [15] and [16] based on the Rademacher- Walsh spectrum. In the following, the arithmetic spectrum as introduced in Section I1 is used to define a weighted spectral sum which is investigated to find criteria for the testability of multiple-output circuits by the chosen signature. Definition 7.1: For a network with m outputs the (arithmetic) spectrum for the switching function f j ( z ) of output j is denoted by A, and the spectral coefficients by a y ) for I C N and j = 1 to m. The weighted (arithmetic) spectral sum of the entire network is given by
irredundant combinational networks. It applies to input and to internal stuck-at faults of single and multiple-output circuits. The general analysis of fault coverage shows the wide range for the choice of signatures. Based on the circuit structure it helps to determine a suitable set of spectral coefficients with high fault coverage and low test complexity. The derivation of the signatures requires a one-time evaluation of a subset of all spectral coefficients with complexity between n and 2” depending on circuit structure and desired fault coverage. So in general the number of feasible inputs is not limited as in case of exhaustive techniques like syndrome testing or verification of Rademacher- Walsh coefficients. Another advantage of the new method is the possibility to choose between short signatures consisting of high order coefficients, which means long test time, or longer signatures of lower order coefficients and shorter test time. The signatures are easily tested using very simple test equipment which could be included on board a chip. As a welcome side effect, spectral tests detect numerous faults which are not covered by the presumed fault model. Hence, arithmetic spectra are an attractive instrument for fault detection.
m
K =
wjAj.
(7)
j=l
The components coefficients, i.e.,
kI
of h’ for I C N are called weighted spectral
REFERENCES Z. Barzalai, D. Coppersmith,and A. L. Rosenberg, “Exhaustive generation of bit patterns with applications to VLSI self-testing,” IEEE Trans. Comput., vol. C-32, pp. 190-194, Feb. 1983. E. B. Eichelberger and T. W. Williams, “A logic design structure for LSI testability,” J. Design Automat. Fault-Tolerant Comput., vol. 2,
According to Lemma 3.1 a stuck-at fault at input i implies a!) = 0 for j = 1 to m and all I N with i E I which means kr = 0. Lemma 7.2: A stuck-at input fault at input i with i E I causes all weighted coefficients kI with i E I and I C N to vanish. Lemma 3.3 guarantees the existence of a coefficient ar # 0. So the weights can be chosen in a way that at least one weighted coefficient kr is different from 0. For instance ap) = a y ) implies w1 # w2. Lemma 7.3: If output values of at least one output depend on the values at input i E N, then a weighted coefficient kI exists with i E I and kI # 0. kr -testability and the signature from weighted spectral coefficients can be defined corresponding to Definition 3.4. Then the above two lemmas yield the following result. Theorem 7.4: For any multiple-output combinational network, there exists at least one signature of weighted spectral coefficients for all combinations of stuck-at input faults. Example 7.5: Consider the circuit with four inputs and two outputs, given by f l ( i ) = ( 2 1 2 4 + 2 3 ) 2 2 and fz(2) = 2 1 z ~ + z l Z 2 3 3 ~ 4 . For any weights w1 = w2 # 0 the weighted spectral coefficient k~ is different from 0 because of a$ = a!) = 1. So {kN} is a signature for all combinations of stuck-at input faults for this circuit. The same holds for instance for { k { l , 4 ) ,k p 3 ) } where = 0, = 0. In this example, the = 1, t1,4) = 1 and combination { a y / , 4 ) , of spectral coefficients from both outputs is a signature for all stuck-at input faults, while { a ~ ~ , 4 1 , a ~and ~,31} are none. For internal stuck-at faults the results of Section IV can be extended to multiple-output circuits in a similar way as discussed above for input stuck-at faults. VIII. CONCLUSION A new kind of fault signature has been introduced followed by a method for the derivation of signatures for stuck-at faults in
pp. 165-178, May 1978. K. D. Heidtmann, “Domination of binary systems,” Tech. Rep. 6, Dep. Math., Univ. Trier, Nov. 1986. S. L. Hurst, The interrelationship between fault signatures based upon counting techniques,” in Developments in Integrated Circuit Testing, D.M. Miller, Ed. New York: Academic, 1987. S. L. Hurst, D. M. Miller, and J. C. Muzio, Spectral Techniquesin Digital Logic. New York Academic, 1985. D. M. Miller and J. C. Muzio, “Spectral techniques for fault detection in combinationallogic,” in Spectral Techniquesand Fault Detection, M. G. Karpovsky, Ed. New York Academic, 1985. S. K. Kumar and M. A. Breuer, “Probabilistic aspects of Boolean switching functions via a new transform,”J. ACM, vol. 28, pp. 502-520, July 1981. P. K. Lui and J. C. Muzio, “Spectral signature testing of multiple stuckat faults in irredundant combinationalnetworks,”IEEE Trans. Comput., vol. C-35, pp. 1088-1092, Dec. 1986. D. M. Miller and J. C. Muzio, “Spectral fault signatures for single stuckat faults in combinational networks,” IEEE Trans. Comput., vol. C-33, pp. 765-769, Aug. 1984. -, “Spectral fault signatures for internally unate combinational networks,” IEEE Trans. Comput., vol. C-32, pp. 1058- 1062, Nov. 1983. K. P. Parker and E. J. McCluskey, “Probabilistic treatment of general combinational networks,” IEEE Trans. Compur., vol. C-24, pp. 668-670, June 1975. -, “Analysis of logic circuits with faults using input signal probabilities,” IEEE Trans. Comput, vol. C-23, pp. 573-578, May 1975. J. Savir, “Syndrome testable design of combinational circuits,” IEEE Trans. Comput., vol. (2-29, pp. 442-451, June 1980. -, “Syndrome testing of ‘syndrome untestable’ combinational circuits,” IEEE Trans. Comput, vol. C-30, pp. 606-608, 1981. M. Serra and J. C. Muzio, “Testing programmable logic arrays by sum of syndromes,” IEEE Trans. Comput., vol. C-36, pp. 1097-1100, Sept. 1987. -, “Space compaction for multiple-output circuits,” IEEE Trans. Comput.-Aided Design, to be published. A. K. Susskind, “Testing by verifying Walsh coefficients,”IEEE Trans. Comput., vol. C-32, pp. 198-201, Feb. 1983. A. Tzidon, I. Berger, and Y. M. Yoeli, “A practical approach to fault detection in combinational circuits,” IEEE Trans. Comput., vol. C-27, pp. 968-971, Oct. 1978.
