Automated Void Detection in Solder Balls in the ... - IEEE Xplore

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Automated Void Detection in Solder Balls in the Presence of Vias and Other Artifacts Asaad F. Said, Member, IEEE, Bonnie L. Bennett, Lina J. Karam, Alvin Siah, Kyle Goodman, and Jeffrey S. Pettinato Abstract— Voids are one of the major defects in solder balls and their detection and assessment can help in reducing unit and board yield issues caused by excessive or very large voids. Voids are difficult to detect using manual inspection alone. 2-D X-ray machines are often used to make voids visible to an operator for manual inspection. Automated methods do not give good accuracy in void detection and measurement because of a number of challenges present in 2-D X-ray images. Some of these challenges include vias, plated-through holes, reflections from the the plating or vias, inconsistent lighting, background traces, noise, void-like artifacts, and parallax effects. None of the existing methods that has been researched or utilized in equipment could accurately and repeatably detect voids in the presence of these challenges. This paper proposes a robust automatic void detection algorithm that detects voids accurately and repeatably in the presence of the aforementioned challenges. The proposed method operates on the 2-D X-ray images by first segregating each individual solder ball, including balls that are overshadowed by components, in preparation for treating each ball independently for void detection. Feature parameters are extracted through different classification steps to classify each artifact detected inside the solder ball as a candidate or phantom void. Several classification steps are used to tackle the challenges exhibited in the 2-D X-ray images. The proposed method is able to detect different-sized voids inside the solder balls under different brightness conditions and voids that are partially obscured by vias. Results show that the proposed method achieves a correlation squared of 86% when compared with manually measured and averaged data from experienced operators from both 2-D and 3-D X-ray tools. The proposed algorithm is fully automated and benefits the manufacturing process by reducing operator inspection time and removing the manual measurement variability from the results, thus providing a cost-effective solution to improve output product quality. Index Terms— 2-D X-ray system, feature segmentation, via, via reflection, void detection.

extraction,

I. I NTRODUCTION

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OIDS are defined as cavities formed inside a solder ball due to the amount of outgassing flux that gets entrapped in the solder ball during reflow. Some causes of voids are trapped flux that has not had enough time to be released

Manuscript received December 1, 2010; revised July 29, 2011; accepted November 14, 2011. Date of publication October 2, 2012; date of current version October 30, 2012. Recommended for publication by Associate Editor M. Ramkumar upon evaluation of reviewers’ comments. A. F. Said, B. L. Bennett, A. Siah, K. Goodman, and J. S. Pettinato are with Intel Corporation, Chandler, AZ 85226 USA (e-mail: [email protected]; [email protected]; kuok.lim.siah@intel; [email protected]; [email protected]). L. J. Karam is with the School of Electrical, Computer, and Energy Engineering, Arizona State University, Tempe, AZ 85281 USA (e-mail: [email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TCPMT.2011.2182613

from the solder paste, and contaminants on improperly cleaned circuit boards. Voids in solder balls are also caused by the reduction in metallic oxides in the soldering fluxes [1]. Voids appear as a lighter area inside the solder balls on a 2-D X-ray image and are typically found randomly throughout the package [1]. Previous studies have shown that the existence of voids decreases the solder ball life, which has been validated through mechanical testing and thermal cycle testing [2]. In [3], the authors concluded that smaller voids grow much more slowly than larger voids. The extensive use of solder joints on printed circuit boards (PCBs) necessitates reliable void detection in the solder joints and balls to prevent infant mortality failures. A sudden increase in voids within ball grid array solder balls indicates that something has changed in the board soldering assembly materials and processes. This can therefore be a trigger to investigate process control issues. Several publications that cover voiding issues in solder balls are referenced for further investigation [4]–[12]. Void inspection criteria are based on the size of the void within an individual solder ball, the cumulative percentage of all the voids within the ball with respect to the area of the ball, and, in some cases, the number of balls with significant cumulative voiding percentages or one extremely large void. The Institute for Printed Circuits (IPC) and the Joint Electron Devices Engineering Council (JEDEC) have developed standards for inspecting assemblies of electronic products. IPCA610D specifies a 25% or less cumulative voiding percentage in post-surface mount technology (SMT) solder balls. JEDEC standard JESD217 specifies 15% or less cumulative voiding for individual solder balls as a guideline for inspecting pre-SMT packages [9], [10]. IPC-7095B provides a guideline for solder ball void detection which considers both the location and size of the voids. The number of publications and specifications addressing voiding issues is an indication of the importance of detecting voids in the electronics industry. The primary method of void detection used in manufacturing today is imaging of the semiconductor device or PCB with a 2-D X-ray machine, and then manually inspecting the image for voids and measuring the individual voids. This method is very time consuming when inspecting large samples with many solder balls. An operator can take up to 4 min to detect and measure voids in a single solder ball. The manual operation is also extremely variable, as shown in Fig. 1. The figure shows data for the same set of images manually measured by 20 different operators and compared with control data averaged from two experienced engineers. The data in Fig. 1 shows significant variation in void measurement among different operators. It is therefore desirable to have an

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automated method to perform the inspection in order to reduce variability and decrease the time required for inspection. The 2-D X-ray machine produces 2-D images that reflect the absorption of the transmitted X-rays into the spherical solder ball thus making the voids inside the solder balls visible to the human eye as shown in Fig. 2. The resultant 2-D X-ray images pose many challenges that make developing an automatic void detection solution quite difficult. Some of these challenges are shown in Fig. 3. The presence of vias on the substrates poses a major problem to manual or automated void detection. The void is often obscured either partially or totally by the vias. The 2-D X-ray images are sharp at the center but a characteristic parallax effect is present around the sides as shown in Fig. 3(d). If a solder ball is located near the edge of an image and happens to be positioned over a via, the parallax effect will spread and blur the via image and create additional difficulty in the detection of the via and any voids that are over or touching the via area. Reflections are often present inside the vias. The reflections can be caused by metal plating or other reflective effects. The reflections can easily be mistaken for voids because of their brightness and size. The reflections also often overlap with the voids themselves, making the separation between void and via reflection a challenge for even an expert operator or machine. Based on our previous work in automated void detection [13], [14], we discovered that the challenge posed by the presence of vias in an image is the largest barrier to accurately detecting voids over a wide variety of product types. Another challenge discovered during our previous work is the appearance of false-positive voids or phantom voids in addition to the true voids. Phantom voids are often caused by the existence of traces or other light-appearing areas in the background of the substrate. These phantom voids distort the total voiding percentage for an individual solder ball. Current 2-D X-ray machine void detection algorithms have issues that make an accurate void detection in the presence of these challenges extremely difficult. Some of the existing X-ray inspection systems include void detection algorithms. However, the use of the void detection algorithms in these systems requires intensive and timeconsuming preprocessing steps and manual fine-tuning. Most of the existing void detection systems use global thresholding to segment the solder balls and the voids inside the 2-D X-ray

image. This is typically done by letting the user set one threshold value to segment the balls in the image. A second threshold value is then set to segment the voids inside the segmented balls. These threshold values are typically determined by the operator by trial and error. The global threshold approach does not allow differentiation between real and phantom voids because of the inconsistencies in image brightness. Most automated detection algorithms also fail to inspect the balls that are occluded by overshadowing components, as shown in Fig. 3(a). In this paper, an improved automatic method for detecting voids inside of solder balls is presented. The method detects voids accurately in the presence of vias and other challenges with minimal phantom void creation. The proposed method consists of segmenting individual balls, extracting occluded balls, extracting via regions, and segmenting voids inside the solder balls. The segmentation of the individual solder balls is achieved by using the proposed histogram and morphological based segmentation methods which are robust to noise and lighting variation. Once the candidate solder balls have been segmented, a via detection procedure, consisting of checking the gray intensity level and shape within the solder ball to determine if a via is present, is applied. Next, an independent edge detection with a contour-closing procedure is used to detect suspect void artifacts inside the individual segmented solder ball. Then, different procedures are applied to each detected artifact within the solder ball. In the proposed void detection system, feature parameters that are based on the shape, intensity, and histogram of each extracted region inside the solder ball are used to filter out phantom voids, via reflections, and undesired artifacts that are present in the solder balls. The accuracy of this methodology has been demonstrated through extensive testing in a factory environment on a wide variety of products. The proposed algorithm was applied to different Intel products. The results of the proposed method were compared with those obtained by an automated algorithm in an existing state-of-the-art 2-D X-ray inspection system, those obtained by trained operators from the manual inspection of 2-D X-ray images, and those obtained by trained operators manually inspecting 3-D computed tomography (CT) scan images. The results show that the proposed method is capable of successfully locating and measuring voids inside solder balls, even the ones that were missed out by using other methods as well as those that are hard to see by the human eye. The results also show a high correlation with ground-truth data obtained from 3-D CT scan examination by experienced operators. This paper is organized as follows. The X-ray setup and the image capturing process are presented in Section II. The proposed automatic void detection algorithm is presented in Section III. Performance results and comparison with existing schemes are presented in Section IV. Conclusion are drawn in Section V. II. I MAGE C APTURING U SING X-R AY T OOLS The setting up of the 2-D X-ray tool is critical to an automated algorithm obtaining repeatable and reproducible results.

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Fig. 2. Solder ball shape in 3-D and the distribution of voids in both 3-D and 2-D images. (a) 3-D image of solder ball. (b) 3-D image cross-section that shows voids inside solder ball. (c) Void distribution in 2-D image.

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Issues related to 2-D X-ray images. (a) Occluded solder balls. (b) Void obscured by via. (c) Via reflection and faded void. (d) Parallax effect.

Instead of matching the X-ray parameters (tool to tool), the objective shifted to matching the X-ray image. Two methods of obtaining tool-matching were tried, both involved matching the gray level of the solder ball. The first method involved the engineer setting up the X-ray tool recipe by using parameters obtained by taking 3–4 samples of pixel gray levels from an X-ray image of a solder ball and adjusting the X-ray parameters until the desired gray level was obtained, and then running the proposed method to compare the results between the golden image and the new image. This method did not produce repeatable results because it was difficult to obtain the average ball gray level from sampling a few pixels in the ball. The gray level of the pixel sampled might not be a true representation of the actual average ball gray level. The pixel could be contained in a via or other background regions, in part of a void, or even within the gray level gradient from the middle to the edge of the ball. The second method tried utilized the entire histogram from an image of a single solder ball, as shown in Fig. 4. The first peak is the gray level in the solder ball and the second peak is the background. The precise location of the solder ball enabled an average ball gray level to be determined from checking the gray levels of solder balls in a variety of product images. The X-ray parameters were varied such that the ball gray level peak was at the target gray level, thus matching the histogram profile. When the X-ray program was transferred to another tool, the same procedure was followed. By adjusting the X-ray parameters to match the ball target gray level peak on each tool, the images were matched. The results of this method showed

good repeatability and reproducibility. This methodology of matching the histogram to a ball gray level target value will be used in setting up the recipe for the 2-D X-ray tool to perform image captures for void detection. Once the X-ray recipe has been developed and is being used to collect the images for the method to operate on, the tool must be monitored for gray level drift. In order to ensure that each tool continues to produce consistent images with the solder ball having the desired gray level, a monitoring process had to be developed. A golden unit as well as a measurement process at the start of each manufacturing shift was implemented. The process consists of measuring three different balls, with varying void sizes, each ball is imaged five times with the data being averaged for each ball. The voiding percentages are then compared with previous measurements to determine whether the measurements are within a set tolerance. If the measurements are within tolerance or under control, then the X-ray system is considered as good and ready for production. If the measurements are not within tolerance, then an investigation into the X-ray equipment is initiated to understand what is causing the image to differ. The monitor is run each shift when the tool is in production to ensure image quality. III. P ROPOSED VOID D ETECTION M ETHOD There are many challenges that are posed in the acquired 2-D X-ray images. These can be summarized as follows: 1) poor image contrast at some balls making void detection difficult even by the human eye; 2) interference from other

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components on the unit or board, such as capacitors, that occlude solder balls; 3) interference from vias and via reflections that have characteristics similar to those of the actual voids; 4) parallax effects around the sides of the X-ray image; and 5) voids that are not consistently circular in shape due to overlapping and shadowing caused by the use of a single 2-D image. Fig. 3 gives some examples of these challenges in the 2-D X-ray images. Most of the existing void detection systems do not provide a robust solution to tackle all the aforementioned challenges in X-ray images. Our previous work in automatic void detection in solder balls [13], [14] tackles most of the above issues and performs well for many products. However, some of these issues still need to be tackled, in particular the ones related to via, via reflection, and extracting solder balls from occluded components in case of an irregular pattern of solder balls. The main purpose of this paper is to provide a consistent, highly accurate, and robust automated void detection method that is capable of tackling most of the aforementioned issues. A block diagram of the proposed void detection scheme is shown in Fig. 5. The proposed method consists of several components including individual solder ball segmentation, extraction of the best template solder ball, extraction of occluded solder balls, via extraction, extraction of the candidate void regions inside each segmented solder ball, and

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feature extraction and classification of each candidate region in order to filter out all non-void areas. The following subsections give some details of the methodologies that were used in each step of the proposed void detection scheme. A. Individual Solder Ball Segmentation Inconsistent lighting in the 2-D X-ray images is one of the main challenges that must be overcome in order to have accurate solder ball detection. Using a fixed threshold for solder ball segmentation does not give accurate results in most 2-D X-ray images and requires manual tuning for each image that was captured at different X-ray settings. In this paper, an automatic adaptive thresholding method based on histogram analysis is used to segment the solder balls accurately under different lighting conditions. Each 2-D X-ray image contains mainly two different objects: solder balls (dark area) and background (brighter area). Fig. 6 shows the histogram of the considered 2-D X-ray images. From the figure, it can be clearly seen that the resulting histogram contains two distinct regions (clusters) represented by two distinct peaks: the solder balls and background regions. The histogram of the two cluster regions can be represented using a mixture of two Gaussian distributions with two different mean and variance parameters. In order to segment the two regions, an automatic threshold is selected midway between the mean values of the two Gaussian distribution functions. First, in order to compute the segmentation threshold, the means of the Gaussian distributions are estimated. For this purpose, we adopted an iterative procedure to calculate the mean values which are then used to compute the segmentation threshold. The steps of the procedure for computing the mean values of the two Gaussian distributions and the calculation of the segmentation threshold can be summarized as follows. Step 1: Compute the histogram distribution of the input image h(i ), where i denotes the 8-bit image intensity, as h(i ) = n i ,

i = 0, 1, . . . , 255

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i = 0, 1, . . . , 255.

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Fig. 7. Process of solder ball segmentation. (a) Original image. (b) Segmentation using adaptive thresholding. (c) Removing artifacts and incomplete solder ball. (d) Locating best solder ball template. (e) Final segmentation mask. (f) Solder balls with accurate segmentation.

Step 3: At the nth iteration, the updated mean values of the two Gaussian functions, u n+1 and u n+1 are given by 1 2 Tn 

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where T n denotes the threshold at the current nth iteration. At n = 0, the initial threshold T 0 is selected to be the mean value of the input image. Step 4: The new updated threshold is obtained from the and u n+1 as follows: mean values u n+1 1 2 + u n+1 u n+1 1 2 . (4) 2 Steps 3 and 4 of the above procedure are repeated until the threshold value T n+1 is no longer changing. This procedure converges in an average of 4–6 iterations. Fig. 7(b) shows the segmentation results for the image given in Fig. 7(a) after using the above procedure for solder ball segmentation. Small artifacts appear in Fig. 7(b) because they have a lower gray level value than the calculated segmentation threshold. A mathematical morphology [15], [16] based on closing and opening operations is used to get rid of these artifacts. Only complete balls need to be processed to achieve an accurate computation of voiding area and total voiding percentages. This necessitates the exclusion of incomplete balls that lie on the image border. An image labeling procedure [15] is used to T n+1 =

discriminate between different segmented regions inside the image shown in Fig. 7(b). Feature parameters based on the area, shape, and the location of each labeled region are used to filter out the artifacts and the incomplete balls that touch the image border. The incomplete ball observed in Fig. 7(c) is connected to the central region and thus not eliminated in this step. Fig. 7(c) shows the results of the proposed procedure in eliminating unnecessary regions. The second step in solder ball segmentation is to check whether the image contains any occluded regions and then extract each individual solder ball from the occluded area as described in the following. B. Solder Ball Extraction from Occluded Areas Most of the existing void detection methods ignore processing solder balls that are occluded by board components because of the difficulties of extracting solder balls from connected areas. In our previous work [13], [14], a method was proposed to extract the solder ball from an occluded region. The proposed method in [13] and [14] exploits the fact that the solder balls have a regular distribution grid and are aligned along different directions, including 0°, ±45°, and ±90°. However, some boards do not have a regular pattern distribution for solder balls, which causes the method in [13] and [14] to produce an inaccurate extraction of solder balls in the occluded regions. In this section, an improved and more robust methodology is described to extract solder balls from the occluded regions in either regular or irregular

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solder ball. The distances between centroids are used to check whether there are overlaps between the extracted solder balls. In case of any overlap, the mean values inside the extracted solder balls are compared with the mean value of the solder ball template in order to eliminate phantom solder balls. The result of extracting all solder balls including the occluded ones is shown in Fig. 7(e). Fig. 7(f) shows the original input image with the contours of the segmented solder balls. The proposed method is highly accurate in segmenting individual or occluded solder balls. (a)

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Fig. 8. Feature extraction based on shape analysis. (a) Principal axes. (b) Roundness.

pattern distributions. The methodology is used to extract the best solder ball template first, and then the cross-correlation coefficient with different shifts is computed between the template solder ball and the occluded regions in order to extract the centroids of the solder balls in the occluded region. The principal axis ratio, the roundness factor (RF), the area, and the gray level value of each segmented region, such as the ones shown in Fig. 7(c), for example, are the major feature parameters that are used in the proposed method to extract the best candidate solder ball template in the image. The principal axes ratio represents the ratio of the minor axis to the major axis of the segmented region [see Fig. 8(a)]. This helps in identifying regions that have irregular shapes. The RF is calculated by R F = 4π A/ p2 , where p and A represents the perimeter and the area of the segmented region, respectively. The RF value would be very close to 1 if the segmented region has a circular shape, it would be less than 1 for noncircular shapes [see Fig. 8(b)]. The solder ball template is developed by checking each region for the RF and the principal axes ratio greater than or equal to 0.9 to develop the candidate regions. The candidate regions are examined to ensure that their area is within a 1% standard deviation of each other so that the best template is extracted as shown in Fig. 7(d). The region that has the highest RF and an area within the previous specifications is used as the best candidate solder ball template. The highlighted solder ball in Fig. 7(d) represents the best solder ball template in the input image. Cross-correlation coefficients between the solder ball template and the occluded regions are computed for different shifts in the x and y directions. If the solder ball template has a match in the occluded regions, the cross-correlation coefficient process produces high values located at the centers of the occluded solder balls. A threshold value that is equal to 0.65 is used for the cross-correlation coefficient and is applied to the computed cross-correlation coefficients in order to locate regions that are likely to represent the extracted occluded solder balls. Centroids are extracted from these regions for further processing. A circle can be drawn around each extracted centroid, with a diameter equal to the diameter of the previously identified best solder ball template. Some of the extracted centroids belong to solder balls and some belong to phantom solder balls. By comparing the distances between these centroids and the gray level distribution inside each extracted solder ball, one can exclude any phantom

C. Via Extraction and Void Detection In order to locate voids inside the individually segmented solder balls, each segmented solder ball is adaptively processed separately. Fig. 9(a) shows a solder ball that has voids with some of the aforementioned issues such as a via, via reflection, inconsistent background lighting, and weak edges between the voids and background. An enhanced version of the input solder ball image shown in Fig. 9(a) is shown in Fig. 9(b). This enhanced version is shown for illustration purposes only and the proposed method is applied on the original solder ball image without enhancement. Voids and via reflections can be seen clearly in Fig. 9(b). Via reflection is one of the main issues in void detection because it has characteristics similar to those the true void such as a similar gray level distribution (brighter region when compared to the surrounding pixels in the neighborhoods of the region contour). It is very important to devise a robust scheme than can discriminate between voids and other artifacts inside the solder ball. Artifacts such as uneven lighting, via reflection, and noise contribute to phantom voids and produce inaccurate measurements. The proposed void detection method is applied to the segmented solder balls and is able to locate actual voids accurately and decrease the phantom voids in the presence of the existing challenges in the 2-D X-ray image. Details about the main components of the proposed void detection method are presented in the following subsections. D. Edge Detection and Via Extraction The 2-D X-ray images suffer from parallax effects around the sides of the images. This produces variable lighting based on the location of the solder balls inside the captured 2-D X-ray image. In addition, the absorption of X-rays by the unit or board material as well as the thickness of the solder ball can produce variable gray level values. Pixels located nearer to the solder ball edges look brighter as compared to pixels located at the center of the solder ball. Void brightness will vary depending on the location of the void inside a solder ball. In many cases, voids appear faded and are hard to distinguish by the human eye due to the closeness of the gray level value of the void to the surrounding pixels, resulting in a very low contrast. Global thresholding fails to locate voids inside solder balls because of the inconsistent brightness of the voids and the issues mentioned previously. In the proposed void detection method, for each segmented solder ball, edge detection is first performed to locate the contours of the voids inside the considered solder ball.

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Fig. 9. Procedures showing the steps of the proposed method for robust void detection. (a) Original solder ball. (b) Enhanced version of (a) showing voids and via reflection. (c) Edge detection with closing open contours. (d) Extracting regions inside closed contours. (e) Via extraction. (f) Output results after initial filtering. (g) Gaussian filter output for the input solder ball. (h) Thresholding output for the Gaussian filter output. (i) Result of the combination of the Gaussian-filtered edge and input image. (j) Removal of the phantom voids using compact factor and axis ratio. (k) Final void detection mask after reconstructing partial voids. (l) Solder ball with detected voids equal to 5.55%.

Edge detection helps to locate the pixels where the gray level difference between neighboring pixels is significant. The output of the edge detection process highlights the regions inside the solder ball with significant gray level differences, and each region is represented by its edge’s contour. There are many edge detection methods [17]–[22] that can be applied to locate an object’s contours. However, in our implementation, a simple and fast Laplacian of Gaussian (LoG) edge detection method [21], [22] performs very well in locating edges. The LoG edge detection is a combination of two filter kernels: a Gaussian filter and a Laplacian filter. The Gaussian filter is used to reduce the high-frequency components and the noise effect in order to obtain a regularized image before using the Laplacian filter. The Laplacian filter is applied to the regularized image in order to locate the edges by using the second derivative of the regularized image. Since the convolution operation is associative, one can convolve the Gaussian filter kernel with the Laplacian filter kernel first, and then convolve this combined filter with the input image to speed up the calculations. The edge detection can, however, result in some open contours. Closing open contours is a necessary process to extract each segmented region. The procedure for closing open contours is performed by, first, labeling each open

contour, and then checking whether there are neighboring open contours, within few pixels, that can be connected together to form an enclosed region. This step is repeated to close each open contour inside each segmented solder ball. Each region inside a closed contour is then extracted by using an image labeling procedure [15]. For example, region Rl with a label l can be extracted from an image f (x, y), where f (x, y) is a labeled image that contains integer numbers representing the labels for the segmented balls, as follows: Rl = {(x, y),

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In (5), x and y represent the pixel locations inside the image f (x, y) and l represents the label number of each segmented region (l = 1, 2, . . . , N). Fig. 9(c) illustrates the edge detection with closed contours for the input solder ball given in Fig. 9(a). The extracted regions from the closed contours are shown in Fig. 9(d). The presence of the via, which shows up during the solder ball inspection using 2-D X-ray images, poses a big challenge to manual or automated void detection. Voids are often obscured either partially or totally by the via. Thus, it is important to locate the via accurately, and then deal with each segmented region inside the solder ball independently

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Fig. 10. Reconstruction of voids obscured by via. (a) Original solder ball. (b) Enhanced version of image in (a). (c) Output results after initial filtering. (d) Final results with detected voids equal to 7%.

based on its location with respect to the via. The via has a ring shape with a gray level value that is less than any other region’s gray level value inside the solder ball. An adaptive thresholding procedure, which is based on the gray level distribution inside the solder joint, is used to locate the via. The mean value (Smean ) and the standard deviation (Sstd ) of the gray level inside the solder ball are first calculated. Voids look brighter than the surrounding region, with slightly higher gray level values than the mean inside the considered solder ball, while vias are darker than the neighboring area with a gray level value that is much lower than the solder ball’s mean intensity. The presence of the vias increases the standard deviation value inside the solder ball. If the standard deviation (Sstd ) is relatively large (e.g., Sstd > 10 in our implementation), this implies the possible presence of a via in the considered solder ball. Consequently, a threshold value Tvia = Smean − Sstd is used to detect candidate via regions that have a mean value less than Tvia for further processing. The resulting regions are labeled to distinguish between each region. The gray level value, area, and compactness factor of each detected region represent the main feature parameters that are used in the proposed method to determine which of the detected regions is a via. The largest area, minimum gray level, and a compactness factor greater than 1.5 are used to extract the via from the remaining regions. The compactness factor is defined as the ratio between the region’s perimeter square to the region’s area [11], [13], [14] . The compactness factor of a region is computed as C F = p2 /(4π A), where, p and A represent the perimeter and the area of the considered region. The compactness factor is used to differentiate between regular and irregular shapes. As indicated before, the compactness factor is close to 1 for a circular shape and is greater than 1 for noncircular shapes. Fig. 9(e) shows the extraction of the via that is present in the image shown in Fig. 9(a) using the above procedure. E. Procedure for Void Detection In order to locate actual voids and eliminate false candidate voids, the proposed void detection system makes use of feature parameters to filter out phantom voids, via reflections, and undesired artifacts that are present in the solder balls. First, feature parameters including the compactness factor and a local threshold parameter that is obtained using adaptive gray level thresholding are used to filter out phantom

voids. These feature parameters are calculated and applied to each extracted candidate void region after the edge detection process. The desired value of the compactness factor for void regions is chosen to be relatively large (≤2 in our implementation) in order to avoid eliminating voids that overlap with other voids, or with via reflections, or with phantom voids. The adaptive gray level threshold value for each candidate void region inside the solder ball is calculated independently (non-global thresholding). The threshold value is calculated on the basis of the gray level distribution inside and outside each candidate void region. Consequently, the resulting threshold value is adaptive based on the location of the extracted regions with respect to the via. Three different cases of adaptive thresholding are considered: 1) when suspect voids are outside the via; 2) when suspect voids touch or overlap with the via; and 3) when suspect voids are located inside the via. For each suspect void outside the via, the threshold value is taken to be the mean value of the area within two pixels outside the suspect void contour. For voids that touch or overlap with the via, the threshold value is calculated based on a fraction of the mean of the pixels that are located within two pixels in the vicinity outside of the void’s contour and that are not touching the via. For voids inside the via, the threshold value is calculated based on a fraction of the gray level mean value of pixels located in the vicinity outside of the void’s contour. In the two latter cases, the threshold value is taken to be a fraction of the mean (0.9) rather than the mean value of neighboring pixels owing to the fact that the voids are relatively dim when they are located inside a via or when they overlap with a via. Any candidate void region that has a mean value less than the adaptive threshold value is filtered out. Then, the compactness factor is used to filter out more phantom voids and keep the regions that are more likely to be voids. Fig. 9(f) shows the output result that is obtained after filtering out false candidate void regions based on adaptive thresholding and the compactness factor. For comparison, Fig. 9(d) shows the input image before filtering is applied to the extracted regions. From Figs. 9(d) and (f), it can be clearly seen that the employed filtering based on the compactness factor and adaptive thresholding was able to successfully decrease the phantom voids and keep the candidate regions that are more likely to be voids. However, as indicated above, a relatively relaxed value was chosen for the compactness factor in order not to filter out actual overlapping voids. Consequently, as

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illustrated in Fig. 9(f), there are still some phantom voids after this initial filtering operation. Another issue is the overlap between voids and via reflections, which can produce phantom voids due to the similarities between the via reflection and the actual voids, as illustrated in Fig. 9(d). In order to separate the via reflections from the voids, the original input image is smoothed using a 11 × 11 Gaussian low-pass filter with a standard deviation value of 1.5. The resulting Gaussian-filtered image contains peaks in regions that correspond to actual voids, where the gray level gradually increases from the void boundaries to the void center. The output of the Gaussian filter for the input solder ball shown in Fig. 9(a) is shown in Fig. 9(g). From Fig. 9(g), it can be observed that regions with brighter areas in the input image result in a higher intensity value in the Gaussian filter’s output. A void region results in a high intensity value after Gaussian filtering, while a via reflection region results in a relatively small intensity value compared to the void region. In addition, a via reflection region exhibits an irregular shape compared to a void region. A thresholding procedure is used to binarize the output of the Gaussian filter in order to extract the brighter regions. Based on experimental observations, it was found that a threshold value Tgf = 0.4∗ max(intensity in Gaussian filter output) is able to separate between voids and via reflections as shown in Fig. 9(h). However, the segmentation output using the threshold value Tgf results in void regions with smaller areas than the actual void areas. A procedure that helps in growing the extracted small areas gradually without changing the number of regions in the image is used to get areas closer to the actual void areas. This is done by gradually decreasing the threshold value Tgf while ensuring that the number of regions is not changing. For this purpose, the threshold value Tgf is decreased gradually, up to a minimum value equal to 0.3* max (intensity in Gaussian filter output), as long as the resulting number of detected void regions is kept unchanged after thresholding with Tgf . Then, candidate void regions that have a compactness factor greater than 1.75, or a principal axes ratio less than 0.35, are filtered out to eliminate via reflections and to reduce further phantom voids. While performing the detection using the Gaussian-filtered image helps in eliminating phantom voids due to via reflection, some phantom void regions with relatively high intensities can still be present. In order to further eliminate these phantom

void regions, a combination of the Gaussian-filtered image that is obtained from the previous step after removing the via reflection [the feature-based filtered image shown in Fig. 9(f)] and the input image shown in Fig. 9(a) is used with more constrained feature parameters. The binarized output of the Gaussian-filtered image is first combined with the featurebased filtered image [Fig. 9(f)] by multiplying the two binary images pixel by pixel. The resulting product image represents a binary mask that has 1s for overlapping nonzero areas between the two images (binarized Gaussian-filtered and featuredbased filtered images) and 0s elsewhere. The nonzero areas of the resulting mask represent the locations of confirmed void regions. Subsequently, a complementary binary mask whose nonzero areas correspond to the nonzero regions in the feature-based filtered image [Fig. 9(f)], which are located in the nonoverlapping areas, is applied to the input image [Fig. 9(a)] in order to extract these candidate nonconfirmed void regions. In order to classify these candidate regions into void or phantom void regions, feature parameters including mean value and adaptive thresholding, compactness factor, and principal axes ratio are used as before but with more constrained values (threshold for adaptive threshold increased by 20%, compactness factor decreased to 1.4, and principal axes ratio decreased to 0.3). The resulting detected voids are shown in Fig. 9(i), where two voids and one phantom void were detected. In order to remove further any detected phantom voids that were not eliminated by the previous operations due to similarities with the actual voids, a circularity constraint is imposed and is quantified using the compactness factor and the principal axes ratio. At this point, a compactness factor greater than 1.15 is used to filter out phantom voids while allowing voids with close-to-circular shapes in addition to partial or incomplete voids to be kept. The principal axes ratio helps to filter out elongated shapes. Any shape that has a principal axes ratio less than 0.3 is filtered out. The resulting output image using these constraints on the feature parameters is shown in Fig. 9(j). From the figure, it can be clearly seen that additional phantom voids were successfully eliminated as compared to Fig. 9(i). Finally, a procedure is used to check whether any partial or incomplete voids are touching the via. In this latter case, the diameter of the partial void is estimated and a circle is drawn at the center point of the longest axis of the detected void. Fig. 9(k) shows an example of reconstructing a complete

SAID et al.: AUTOMATED VOID DETECTION IN SOLDER BALLS

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void from a partial void using the proposed procedure. Fig. 9(l) shows the final void detection result using the input image given in Fig. 9(a). If any partial voids are separated by the via as shown in Fig. 10, a circle that includes both partial voids around the via is drawn with a center equal to the centroid of a box that includes the two voids and with a diameter equal to the longest distance between points in both partial voids. Fig. 10 illustrates the robustness of the proposed algorithm in its ability to accurately detect the obscured voids and to decrease phantom voids. The feature parameters that were used in this section were applied for a subset of solder bump varieties with different materials and sizes for validation. We did not try all possible solder bump sizes and materials, but the method is applicable to other materials as long as the contrast between the ball and the voids can be maintained. The algorithm is adjustable for voids that are brighter or darker than the solder ball.

X-ray images of the solder ball that are shown as a series of 2-D cross-sectional images. The operator evaluated the series of images to locate the largest cross section for each observed void. The operator then calculated the width and the height of the void in order to measure the void area and then summed up all the void areas and divided the sum by the total solder ball area to get the percentage of voiding in the ball. From Fig. 11, the slope of the method and the manual average measurements are statistically equal to 1. The bias between the measurements is statistically equal to 0. These results show that the method performs well across tools. The repeatability and reproducibility of the results from the proposed method have also been proven. Fig. 12(a) and (b) shows the repeatability results for the same product taken with two different X-ray tools. The proposed method gives a standard deviation of void percentage equal to 0.5% in Tool 1 and 0.4% in Tool 2.

IV. P ERFORMANCE R ESULTS

A robust automatic void detection scheme was presented in order to allow automated inspection and automated manufacturing quality assessment. The proposed method was fully automated and can benefit the manufacturing process by reducing the operator’s effort and process variability. The algorithm works for all products without specific tuning. The histogrammatching recipe method has proven to enable tool matching performance. The method has been implemented in a standalone PC that was configured to retrieve images automatically from a 2-D X-ray system, thus reducing the time to run the method to the time the X-ray takes to produce the images. The proposed method has been measured to be five times faster than manual operations and runs while the X-ray was processing other images. The entire void measurement process for a single solder ball takes milliseconds as compared to an operator taking 4 min. The proposed method was generally applicable to all void types (macro, planar, micro, shrinkage, pinhole, kirkendall) provided that the contrast between the solder ball and the void can be maintained through the X-ray calibration process. The proposed method can enable compliance to IPCA610D for cumulative voiding of 25% or less in post-SMT solder joints and the new JEDEC guideline

The proposed method was extensively tested on a wide variety of products. Each product had a different average void percentage ranging from low to high. Some of the tested products had issues related to via whereas other did not. The proposed method was applied to all tested products without special tuning or tweaking for each product. This makes the proposed method robust and adaptive to the variations and to the different issues that are present in each product. Different X-ray tools were used to test the matching, repeatability, and reproducibility of each product in order to validate the robustness of the proposed method. A golden set of images from different products were used to show the performance of the proposed method in different X-ray tools. The filaments, cameras, the age and condition of the detectors can cause variations in the X-ray tools. No two tools are identical. The matching results range from a correlation squared of 76% on Tool 1 to 86% (75% and above is the acceptable range) on Tool 2 as given in Fig. 11(a) and (b), respectively, when compared with averaged measurements from experienced operators. The averaged measurements were obtained from an operator measuring the void percentage from 3-D

V. C ONCLUSION

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JC-14-1 for cumulative voiding in a sample of solder ball measurements not to exceed 15%. R EFERENCES [1] R. Prasad. (2003). BGA voids and their sources in SMT assemblies. Surf. Mount Technol. Mag. [Online]. Available: http:// www.rayprasad.com/home/rp1/page_91/bga_voids_and_their_sources_ in_smt_assemblies.html [2] Q. Yu, T. Shibutani, Y. Kobayashi, and M. Shiratori, “The effect of voids on thermal reliability of BGA lead free solder joint and reliability detecting standard,” in Proc. Intersoc. Conf. Thermomech. Phenomena Electron. Syst., San Diego, CA, 2006, pp. 1024–1030. [3] V. Tvergaard and C. Niordson, “Nonlocal plasticity effects on interaction of different size voids,” Int. J. Plasticity, vol. 20, no. 1, pp. 107–120, 2004. [4] D. R. Banks, T. E. Burnette, Y. Cho, W. T. DeMarco, and A. J. Mawer, “The Effects of solder joint voiding on plastic ball grid array reliability,” in Proc. Surface Mount Int., 1996, pp. 121–126. [5] Q. Yu, T. Shibutani, D.-S. Kim, Y. Kobayashi, J. Yang, and M. Shiratori, “Effect of process-induced voids on isothermal fatigue resistance of CSP lead-free solder joints,” Microelectron. Reliabil., vol. 48, no. 3, pp. 431– 437, 2008. [6] X. Luhua and J. H. L. Pang, “Effect of intermetallic and Kirkendall voids growth on board level drop reliability for SnAgCu lead-free BGA solder joint,” in Proc. 56th Electron. Compon. Technol. Conf., San Diego, CA, 2006, pp. 1–8. [7] S. Belyakov, H. Atkinson, and S. Gill, “Crystallographically faceted void formation in the matrix of lead-free solder joints,” J. Electron. Mater., vol. 39, no. 8, pp. 1295–1297, 2010. [8] J. Lau, S. Erasmus, and S. Pan, “Effects of voids on bump chip carrier (BCC++) solder joint reliability” in Proc. 52nd Electron. Compon. Technol. Conf., 2002, pp. 992–1000. [9] R. Aspandiar, “Voids in solder joints,” Surface Mount Technol. Associat. J., vol. 19, no. 4, pp. 28–36, 2006. [10] I. Hsu and R. Aspandiar, “Comparison of various metrologies to measure voids in X-ray images of high density BGA package solder balls,” in Proc. Surface Mount Technol. Associat. Conf., 2010. [11] A. F. Said, B. L. Bennett, L. J. Karam, and J. S. Pettinato, “Automated detection and classification of non-wet solder joints,” IEEE Trans. Automat. Sci. Eng., vol. 8, no. 99, pp. 67–80, Jan. 2010. [12] A. F. Said, B. L. Bennett, F. Toth, K. J. Lina, and P. Jeff, “Non-wet solder joint detection in processor sockets and BGA assemblies,” in Proc. IEEE Electron. Compon. Technol. Conf., Las Vegas, NV, 2010, pp. 1147–1153. [13] A. F. Said, B. L. Bennett, L. J. Karam, and J. Pettinato, “Robust automated void detection in solder balls and joints,” in Proc. IEEE Acoustics Speech Signal Process. Int. Conf., Dallas, TX, Mar. 2010, pp. 1650–1653. [14] A. F. Said, B. L. Bennett, L. J. Karam, and J. Pettinato, “Robust automatic void detection in solder balls,” in Proc. IEEE Int. Conf. Acoustics Speech Signal Process., Dallas, TX, Mar. 2010, pp. 1650– 1653. [15] R. M. Haralick and G. L. Shapiro, Computer and Robot Vision. Reading, MA: Addison-Wesley, 1992. [16] B. Rein van den and B. Richard van, “Methods for fast morphological image transforms using bitmapped binary images,” CVGIP: Graph. Models Image Process., vol. 54, no. 3, pp. 252–258, 1992. [17] R. C. Gonzalez and R. E. Woods, Digital Image Processing. Englewood Cliffs NJ: Prentice Hall, 2003. [18] J. Canny, “A computational approach to edge detection,” IEEE Trans. Pattern Anal. Mach. Intell., vol. 8, no. 6, pp. 679–698, Nov. 1986. [19] J. S. Lim, 2-D Signal and Image Processing. Englewood Cliffs NJ: Prentice Hall, 1990. [20] J. R. Parker, Algorithms for Image Processing and Computer Vision. New York: Wiley, 1997. [21] S. Tabbone, “Detecting junctions using properties of the Laplacian of Gaussian detector,” in Proc. IEEE 12th IAPR Int. Conf. Pattern Recognit., Oct. 1994, pp. 52–56. [22] S. A. Tabbone, L. Alonso, and D. Ziou, “Behavior of the Laplacian of Gaussian extrema,” J. Math. Imaging Vision, vol. 23, no. 1, pp. 107– 128, 2005.

Asaad F. Said (M’06) received the B.S. and M.S. degrees (with honors) in electrical engineering from Assuit University, Asyut, Egypt, and the Ph.D. degree in electrical engineering from the School of Electrical, Computer, and Energy Engineering, Arizona State University, Tempe, in 2010. He is now a Research Scientist and Lead Image Processing Expert with the Automation Pathfinding Group, Intel’s Assembly Test Technology Development Division. He is currently working on automatic defect detection and classification in semiconductor devices. In 2007, he was an intern with Freescale Semiconductor, Austin, TX, working in the area of nonlinear power amplifiers. In 2008, he was an intern with Intel Corporation, Chandler, AZ, working in the area of defect detection and classification using innovative image processing techniques. After his internship with Intel, he was awarded a two-year grant from Intel to continue his research work in defect detection, while he was working toward the Ph.D. degree at Arizona State University. His work has resulted in several peer-reviewed publications in journals including those of the IEEE. He has filed patent applications in the fields of biomedical image segmentation and biomedical image analysis. His current research interests include automatic defect detection and classification, cellular image and texture image segmentation, adaptive filtering, and level-set applications in image processing. Dr. Said received the Palais’s Outstanding Doctoral Student Award in 2010. He is a member of the IEEE Signal Processing Society and the Honor Society of Phi Kappa Phi.

Bonnie L. Bennett received the B.S. degree in mathematics from Arizona State University, Tempe, and a certificate in data warehousing from the University of California Berkeley, Berkeley. She is a Research Technologist with the Assembly Test Technology Development Division, Intel Corporation, Chandler, AZ. She is currently in charge of a program to develop image analysis algorithms and fully automated image analysis systems for failure analysis, technology development, and high-volume manufacturing for chip packaging, assembly, and testing. In addition to leading an internal team of engineers, she is also responsible for image analysis research collaborations with universities. She was with Lockheed Martin Missiles and Space Corporation, Sunnyvale, CA, for 15 years, where she was involved in the development of advanced navigation technology for underwater vehicles and drones. She has published 18 internal and external research papers and has been an invited speaker to the Massachusetts Institute of Technology’s Industry Colloquia. Mrs. Bennett is a recipient of the Lockheed President’s Award.

Lina J. Karam received the B.E. degree from the American University of Beirut (AUB), Beirut, Lebanon, and the M.S. and Ph.D. degrees in electrical engineering from the Georgia Institute of Technology, Atlanta, in 1989, 1992, and 1995, respectively. She is currently a Full Professor with Arizona State University, Tempe, where she directs the Image, Video, and Usability and the Real-Time Embedded Signal Processing Laboratories. Earlier, she was with Schlumberger Well Services, Dallas, TX, where she worked on problems related to data modeling and visualization, and with the Signal Processing Department, AT&T Bell Laboratories, Murray Hill, NJ, where she worked on problems in video coding from 1992 to 1994.

SAID et al.: AUTOMATED VOID DETECTION IN SOLDER BALLS

Prof. Karam is the recipient of the National Science Foundation CAREER Award, the NASA Technical Innovation Award, and the AUB Distinguished Alumnus Award. She served as the Chair of the IEEE Communications and Signal Processing Chapters in Phoenix in 1997 and 1998. She was as an Associate Editor of the IEEE T RANSACTIONS ON I MAGE P ROCESSING from 1999 to 2003 and from 2006 to 2010 and the IEEE S IGNAL P ROCESSING L ETTERS from 2004 to 2006. She served as a member of the IEEE Signal Processing Society’s Conference Board from 2003 to 2005, and as a Lead Guest Editor of the IEEE Journal on Selected Topics in Signal Processing, Special Issue on Visual Media Quality Assessment, and a Technical Program Chair of the IEEE International Conference on Image Processing in 2009. She was a Guest Editor for the IEEE S IGNAL P ROCESSING M AGAZINE and the EURASIP Journal on Image and Video Processing. She is a Founding Member of the International Workshop on Video Processing and Quality Metrics for Consumer Electronics and the International Workshop on Quality of Multimedia Experience. She currently serves on the editorial boards of the Foundations and Trends in Signal Processing journals, as a member of the IEEE Signal Processing Society’s (SPS) Nominations and Awards Committee, and the General Chair of the 2016 IEEE International Conference on Image Processing. She was an Elected Member of the IEEE Circuits and Systems Society’s Digital Signal Processing Technical Committee, the IEEE SPS Image, Video, and Multidimensional Signal Processing Technical Committee from 2005 to 2011, the IEEE SPS Multimedia Technical Committee, and the IEEE SPS Education Technical Committee.

Alvin Siah author photograph and biography not available at the time of publication.

Kyle Goodman author photograph and biography not available at the time of publication.

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Jeffrey S. Pettinato received the B.S. and M.S. degrees in electrical and computer engineering from George Mason University, Fairfax, VA. He is a Senior Principal Engineer and the Automation Strategy and Pathfinding Manager with Intel’s Assembly Test Technology Development Division. He is responsible for defining the strategic direction for semiconductor assembly, testing factory automation, and driving research into future technologies across a broad array of areas that include defect analysis and classification, process controls, engineering analysis, factory cycle time optimization, equipment controls and data flow optimization, and factory scheduling and dispatching. He has held various technical and management positions with Intel Corporation, Chandler, AZ, where he is working on advanced process controls, advanced equipment controls, and automated material handling systems (AMHS). He has co-led the iNEMI roadmap chapter on information management systems to define future needs in the electronics industry for factory and supply chain systems in 2009. From 2002 to 2006, he was an Intel Representative to the International SEMATECH Manufacturing Initiative and helped guide industry direction for advanced 300-mm factory capabilities and strategic planning for the 45-mm wafer size conversion. From 2000 to 2003, he chaired the International Technology Roadmap for Semiconductors Factory Integration Working Group to define a 15-year horizon of needs and potential solutions for manufacturing, equipment, facilities, and automation capabilities. From 1996 to 2000, he led the I300I Consortia’s Computer Integrated Manufacturing Working Group in partnership with Japan’s J300/SELETE consortia to create global factory automation requirements for the 300-mm wafer transition, which resulted in ground-breaking open industry standards and capabilities being implemented into virtually every 300-mm process, metrology, and AMHS equipment used today.