A Parallel Algorithm for Constructing Obstacle ...

Int'l Conf. Par. and Dist. Proc. Tech. and Appl. | PDPTA'12 |

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A Parallel Algorithm for Constructing Obstacle-Avoiding Rectilinear Steiner Minimal Trees on Multi-Core Systems Cheng-Yuan Chang and I-Lun Tseng Department of Computer Science and Engineering Yuan Ze University, Taiwan

Abstract - In the field of integrated circuit physical design automation, the problem of obstacle-avoiding rectilinear Steiner minimal tree (OARSMT) construction is a fundamental problem and has attracted a lot of research attention. In this paper, a parallel algorithm for constructing OARSMTs is proposed. The algorithm is based on maze routing and double front-wave expansion. Experimental results show that our algorithm not only generates very short wires, but also performs efficiently on shared-memory multi-core computer systems. Compared with the sequential execution of our parallel program that has been implemented, the program can achieve 23% speed-up on average while running on a multicore workstation. Keywords: VLSI Physical Design Automation, Routing, Parallel Programming, Multi-Core, Algorithm 1

1

Introduction

As the semiconductor process technology advances, transistor feature sizes have been shrinking. As a result, an integrated circuit can accommodate many transistors and building blocks. To implement an integrated circuit containing complex functions, a number of building blocks are usually required. Since each building block performs a specific set of functions (e.g., inverter, NAND, NOR, shift register, memory, and ALU), we can combine many building blocks and make proper connections between their terminals in order to build a larger circuit. Routing algorithms, which are capable of making connections between building blocks, play a crucial role, especially when the design is large or complex. In the field of integrated circuit physical design automation [5, 6], many routing algorithms require the function of constructing rectilinear Steiner minimal trees (RSMTs). That is because most integrated circuit layouts use rectilinear wires. Also, by minimizing the total wire length of an integrated circuit, the signal propagation delay, the power consumption, and the die size can all be reduced. Since an integrated circuit layout can contain building blocks and prerouted nets, it is desirable to consider regions that cannot be 1

This research was supported in part by the National Science Council of Taiwan under grants NSC-98-2221-E-155-053 and NSC99-2221-E-155-088.

passed through by a net (or wire) as obstacles. Consequently, developing efficient algorithms for solving the obstacleavoiding rectilinear Steiner minimal tree (OARSMT) problem is important and has thus received a lot of research attention [1-4, 7-10]. Although many algorithms have been proposed in order to solve the OARSMT problem, most of these algorithms are sequential, rather than parallel. As inexpensive multi-core processors and computer systems have become widely available, developing parallel algorithms allows us to exploit the computational power from these shared-memory multicore systems. This article presents a parallel algorithm for constructing OARSMTs. The algorithm is based on Watanabe’s Steiner tree construction algorithm [12], but there are differences between these two approaches. First, our algorithm is suitable for use on a shared-memory multi-core computer system, whereas Watanabe’s algorithm is suitable for use on a computer system containing a two-dimensional array processor. Specifically, an array processor can have as many as tens of thousands of processing elements, while a sharedmemory multi-core computer may have less than ten processor cores. Second, our algorithm adopts two parallelized procedures, namely PARALLEL-CONNECT() and PARALLEL-CLEANUP(), and these two procedures can efficiently reduce the program execution time. The parallel algorithm proposed in this article has been implemented in C++ with the use of OpenMP [13]. Experimental results show that the implemented parallel program performs efficiently on a shared-memory multi-core workstation. The remainder of this article is organized as follows. In Section 2, we formulate the OARSMT problem. Our parallel algorithm for constructing OARSMTs is presented in Section 3. Experimental results are given in Section 4. Finally, conclusions are drawn in Section 5.

2

Problem Formulation

In the xy plane, let T = {t1, t2, … , tm} be a set of m terminals which are to be connected by a net (or wire), and let O = {o1, o2, … , on} be a set of n rectilinear obstacles. A terminal can exist on the boundary or on a corner of an obstacle, but cannot exist within an obstacle. In Fig. 1(a), for example, t2 is a valid terminal since it is on the boundary of an obstacle, whereas t3 is an invalid terminal since it is located

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within the obstacle. Invalid terminals cannot appear in an instance of the OARSMT problem. For the figures in this article, obstacles are denoted by light-gray regions. With regard to physical positions of line segments of a wire, a line segment can overlap with the boundary of an obstacle as shown in Fig. 1 (b), but cannot pass through the interior of an obstacle as shown in Fig. 1 (c). Since a wire is composed of rectilinear line segments, the total wire length of a routing result is computed as the sum of the lengths of all line segments. Fig. 1 (d) illustrates a valid routing result and its total wire length is 8. The OARSMT problem is defined below. Definition 1 (The OARSMT Problem): Given a set T of terminals and a set O of rectilinear obstacles in the xy plane, we are requested to construct a net (or wire) which consists of rectilinear line segments and connects all the terminals in T, while possibly through some Steiner points. In addition, line segments of the net cannot pass through the interior of each obstacle in O, and the total wire length of the routing result must be minimal.

3

The Algorithm

Our approach for constructing an OARSMT is based on Watanabe’s algorithm [12], which mainly consists of two repetitive phases (known as double front-wave expansion). The first phase is called the first front-wave propagation; a set of start points PS is selected, and then we propagate from these points in order to find another terminal tt  T, which is the closest to PS. During the propagation process, in addition, the propagation wave cannot pass through the interior of each obstacle. Also, the shortest distance between a point in PS and each visited grid point must be recorded; the numbers representing these distances are called distance numbers. The second phase of Watanabe’s algorithm is named the second front-wave propagation; another propagation wave starts from the terminal tt to reach either a point or points in PS. An overlapping region between the first and the second phases can thus be found. Moreover, Steiner points can also be determined. Therefore, an OARSMT can be obtained after connecting all the Steiner points and terminals. Our parallel algorithm for constructing an OARSMT from given sets of T and O is described in Fig. 2. First, a start terminal (ts) must be selected from T. Although an arbitrary terminal can be selected from T as the start terminal, our implementation of the algorithm selects the terminal which has the least value in terms of the sum of x and y coordinates. The set V is used for storing all the terminals that have been visited during double front-wave expansion. Since the algorithm starts by propagating from the start terminal ts, it is assigned to V in line 2. The set S, which can be implemented as a task queue, is used for storing grid points from which the next iteration of double front-wave expansion will start; these grid points may include terminals and/or Steiner points.

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Figure 1. Valid and invalid OARSMT examples and routing results.

Algorithm PARALLEL-OARSMT-CONSTRUCTION( T, O ) Input: T /* all the terminals which are to be connected */ O /* all the rectilinear obstacles */ Output: An OARSMT which connects all the terminals in T using only horizontal and/or vertical line segments while these line segments cannot pass through the interior of each obstacle. 1. ts ← select a start terminal from set T 2. V ← ts 3. S ← ts 4. while ( | V | < | T | ) { 5. ti ← PROPAGATE_1ST( S ) 6. p ← PROPAGATE_2ND( ti ) 7. R ← the intersection region between the first and the second front-wave propagation phases. 8. Insert ti into V. 9. if ( p ≠ NULL AND p  T ) 10. PARALLEL-CONNECT() 11. PARALLEL-CLEANUP() 12. S ←  13. S ← all the grid points from which the first front-wave propagation in the next iteration will start. 14. } 15. FINAL-CONNECT() 16. return the completed OARSMT Figure 2. The proposed parallel algorithm for OARSMT construction.

The while loop in line 4 checks whether all the terminals have been visited or not. Lines 5–13 will be executed if at least one terminal in T has not been visited. The first frontwave propagation phase is implemented in the procedure PROPAGATE_1ST(); the procedure returns a terminal (ti) which is the terminal found in the phase and is the closest terminal to grid points in S. Note that distance numbers increase as the propagation proceeds during this phase. The second front-wave propagation phase is implemented in the procedure PROPAGATE_2ND(). The procedure returns p, which is either a newly found Steiner point or NULL. Note that distance numbers decrease as the propagation proceeds during this phase. In line 7, a region R, which is the intersection of regions between the first and the second propagation phases, can be obtained. In line 8, the terminal that has just been discovered during the first front-wave propagation phase is inserted into V. In lines 9–10, if Steiner point p exists and it is not an element in T, the wire connections between p and terminals in a region which was formed previously will be made. We have found that the connection process can be parallelized; it has been implemented in the procedure PARALLEL-CONNECT(). The procedure can efficiently speed up the connection process and will be described in detail in subsection 3.1.

Int'l Conf. Par. and Dist. Proc. Tech. and Appl. | PDPTA'12 |

Since distance numbers are recorded during double frontwave expansion, parts of these numbers must be cleared in preparation for the next double-wave expansion iteration. Because the process of clearing distance numbers does not have any data dependency, the process can be parallelized; the parallelized process has been implemented in the procedure PARALLEL-CLEANUP() and will be described in detail in subsection 3.2. In lines 12–14 of our parallel algorithm, the set S is reset and then its content is updated in preparation for the next iteration of double-wave expansion. After all iterations of double-wave expansion have been completed, there can still exist terminals that remain unconnected. The procedure FINAL-CONNECT() will complete the routing for these unconnected terminals. Fig. 3 illustrates an example of constructing an OARSMT by using our algorithm. As shown in Fig. 3(a), an instance of the OARSMT problem, which is to be solved, contains four terminals and three obstacles. If t1 is the start terminal, the first front-wave propagation phase will generate distance numbers, as shown in Fig. 3(b), after t2 is reached. The second front-wave propagation phase, which starts from t2 and then reaches t1, will generate the result as illustrated in Fig. 3(c). Note that the second propagation phase will only visit grid points that have been visited previously in the first propagation phase. Therefore, the overlapping region (region A) between the first and the second front-wave propagation phases can be obtained, as shown in Fig. 3(d). After the first iteration of the while loop finishes, set S contains all the grid points which are on the boundary of region A; these points include terminals t1 and t2. During the second iteration of the while loop, terminal t4 will be visited and then region B will be generated. A Steiner point, which is at the intersection between regions A and B, can be obtained; the point is named p1 in Fig. 3(e). The procedure PARALLEL-CONNECT() can then be invoked to connect p1 and t1 as well as to connect p1 and t2, as illustrated in Fig. 3(f). After that, the third iteration of the while loop will visit t3, and region C in Fig. 3(g) will be formed. Next, Steiner point p2 will be obtained, and it can then be connected to p1 and t4. Finally, the unconnected terminals (i.e., t3 only in this example) can be connected after invoking the procedure FINAL-CONNECT(). The final routing result is shown in Fig. 3(h).

3.1

Parallel-Connect

In Watanabe’s PAR-1 algorithm [12], a parameter named expansion distance (denoted by Dex) is used to control the quality of routing during front-wave propagation phases. When Dex=1, the PAR-1 algorithm is equivalent to Lee’s algorithm [14], and a wire whose length is the shortest between two given points can be obtained. On the other hand, when Dex=  , a wire which has the minimum number of bends can be generated, although the wire length may not be the shortest. The procedure PARALLEL-CONNECT() is used to connect a Steiner point with other points, including terminals and/or

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other Steiner points, within a region. The technique of frontwave propagation is also used in the procedure. However, the procedure is parallelized and parameter Dex is set to infinity. Therefore, connections will be made within the region and have the minimum number of bends. As a result, final routing results generated by our algorithm can have minimal total wire lengths and minimal number of bends. An example for illustrating detailed steps of PARALLELCONNECT() is shown in Fig. 4. In this example, we assume that Steiner point p1 has been found, and we need to connect p1 to t1 as well as connect p1 to t2, as shown in Fig. 4(a). Also, connections must be made within region A. After the frontwave propagation phase, which starts from p1, with Dex set to  is finished, distance numbers for visited grid points are shown in Fig. 4(b). In the backtracking phase, terminal t1 must be connected to p1 and terminal t2 must also be connected to

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p1. Since t1 and t2 must be located on different corners of region A and p1 must be on the boundary of region A, the two connection processes are independent and can thus be parallelized. Therefore, the connection between t1 and p1 can be made by one thread while the connection between t2 and p1 can be made by another thread. Because there are two possible routes for the connection between t1 and p1, one of the two possible connection results, shown in Fig. 4(c) and Fig. 4(d), will be generated. After all the terminals have been visited during iterations of double front-wave expansion, there may still exist terminals that have not been connected. These terminals will be connected via procedure FINAL-CONNECT().

3.2

Experimental Results

The algorithm presented in Fig. 2 has been implemented in C++ with the use of OpenMP [13]. Experiments were carried out on a Linux workstation containing two Quad-Core Xeon E5520 2.26GHz processors and 32GB of RAM. Table I shows statistics information for each of 21 benchmark testcases; the information includes the number of terminals (denoted by #Pin) and the number of obstacles (denoted by #Obs). Among these benchmark testcases, five were industrial

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Parallel-CleanUp

After each iteration of the first and the second front-wave propagation phases, an intersection region R can be obtained, as mentioned previously. However, distance numbers for grid points which are not located in the intersection region must be reset to zero before the next iteration of double front-wave expansion starts. The process of resetting distance numbers of grid points is named the clean-up process and can be parallelized. Fig. 5(a) illustrates an example where region A has been generated. After the execution of the clean-up process, distance numbers for grid points outside region A will be reset, as shown in Fig. 5(b). Another occasion that requires the invocation of the clean-up process is when wire connections within a region have been made, and the region must be removed in preparation for the next iteration of double front-wave expansion. For example, in Fig. 5 (c), region A has been generated, followed by the generation of region B. Also, Steiner point p1 has been obtained. After terminals t1 and t2 have been connected to p1, therefore, distance numbers for grid points after performing double front-wave expansion as well as distance numbers for grid points inside region A must be reset. However, distance numbers for grid points inside regions which have not been removed must be kept intact. The result after executing the clean-up process is illustrated in Fig. 5(d). Since the two occasions for performing the clean-up process can be merged, we implemented the clean-up process in procedure PARALLEL-CLEANUP(). The procedure can be parallelized because there is no data dependency while resetting distance numbers for individual grid points.

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testcases (ind1 to ind5) from Synopsys, eleven testcases (rc01 to rc11) were used in [7, 8], and five randomly-generated testcases (rt01 to rt05) were used in [1, 8]. Table I also shows the execution times of our program for solving these benchmark testcases. On average, 23% speed-up can be achieved while executing the parallel program using 4 threads for solving these benchmark testcases. Table II presents comparisons of total wire lengths for routing results generated by different OARSMT algorithms; the testcases listed in the table are the same as the ones listed in Table I. Additionally, Table III shows comparisons of total wire lengths for routing results generated by different

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TABLE II. Comparisons of Total Wire Lengths for Different OARSMT Algorithms Testcase

Lin [1]

Lin [3]

Long [2]

Li [4]

Liu [9]

Liu [10]

Ajwani [7]

Our Program

ind1 ind2 ind3 ind4 ind5 rc01 rc02 rc03 rc04 rc05 rc06 rc07 rc08 rc09 rc10 rc11 rt1 rt2 rt3 rt4 rt5 Normalized

632 9600 613 1121 1364 26900 42210 55750 60350 76330 83365 113260 118747 116168 170690 236615 2267 48441 8368 10306 53993 1.0188

632 9600 613 1121 1364 26900 42210 55750 60350 76330 83365 113260 118747 116168 170690 236615 2267 48441 8368 10306 53993 1.0188

639 10000 623 1126 1379 27540 41930 54180 59050 74630 86381 117093 122306 119308 167978 232381 2362 52218 8645 10580 55286 1.0258

619 9500 600 1096 1360 25980 42010 54390 59740 74650 81607 111542 115931 113460 167620 235283 2231 47297 8187 9914 52473 1.0010

626 9700 600 1095 1364 26740 42070 54550 59390 75440 81903 111752 118349 114928 167540 234097 2259 48684 8347 10221 53745 1.0075

604 9600 600 1092 1353 25980 41350 54360 59530 74720 81290 110991 115516 113254 166971 234875 2193 46965 8136 9832 52318 0.9977

604 9500 600 1129 1364 25980 42110 56030 59720 75000 81229 110764 116047 115593 168280 234416 2191 48156 8282 10330 54634 1.0063

619 9500 600 1100 1362 25980 42280 54500 59460 74910 81551 110899 116272 113581 167130 234748 2255 46976 8168 9923 52422 1

OARSMT algorithms when all the obstacles in each of the benchmark testcases have been removed. As can be seen in both tables, our approach is very competitive in terms of minimizing total wire lengths.

5

Conclusion

We proposed a parallel algorithm which is capable of constructing obstacle-avoiding rectilinear Steiner minimal trees (OARSMTs) in the gridded xy plane. The algorithm is based on maze routing and double front-wave expansion. Although our approach does not use refinement techniques, experimental results have shown that it is very competitive in terms of minimizing total wire lengths. Moreover, 23% speed-up can be achieved on average while executing the parallel program using 4 threads on a multi-core computer system. [11]

References [1] Chung-Wei Lin, Szu-Yu Chen, Chi-Feng Li, Yao-Wen Chang, and Chia-Lin Yang, “Efficient Obstacle-Avoiding Rectilinear Steiner Tree Construction,” In Proceedings of International Symposium on Physical Design, pp. 127134, 2007. [2] Jieyi Long, Hai Zhou, and S. O. Memik, “EBOARST: An Efficient Edge-Based Obstacle-Avoiding Rectilinear Steiner Tree Construction Algorithm,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 12, pp. 2169-2182, 2008. [3] Chung-Wei Lin, Szu-Yu Chen, Chi-Feng Li, Yao-Wen Chang, and Chia-Lin Yang, “Obstacle-Avoiding

TABLE I. EXECUTION TIMES OF OUR PROGRAM FOR SOLVING BENCHMARK TESTCASES Testcase #Pin

#Obs

Sequential Parallel - 4 threads (sec.) (sec.)

ind1 10 ind2 10 ind3 10 ind4 25 ind5 33 rc01 10 rc02 30 rc03 50 rc04 70 rc05 100 rc06 100 rc07 200 rc08 200 rc09 200 rc10 500 rc11 1000 rt01 10 rt02 50 rt03 100 rt04 100 rt05 200 Average –

32 43 50 79 71 10 10 10 10 10 500 500 800 1000 100 100 500 500 500 1000 2000 –

0.051559 1.00103 0.028653 0.084594 0.081815 15.3816 31.2229 65.5559 75.34 152.075 158.355 318.218 312.269 273.089 880.173 2056.31 0.158169 58.0274 1.52453 1.47087 47.4726 –

0.030271 0.690316 0.022504 0.047688 0.060735 12.4315 20.8785 49.2805 51.399 115.974 128.996 261.375 252.955 206.761 741.824 1866.28 0.12368 46.7059 1.32847 1.22571 37.1076 –

Speed-Up (%) 41.29 31.04 21.46 43.63 25.77 19.18 33.13 24.83 31.78 23.74 18.54 17.86 18.99 24.29 15.72 9.24 21.80 19.51 12.86 16.67 21.83 23.48

Rectilinear Steiner Tree Construction Based on Spanning Graphs,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 4, pp. 643-653, 2008. [4] Liang Li and Evangeline F.Y. Young, “ObstacleAvoiding Rectilinear Steiner Tree Construction,” In Proceedings of International Conference on ComputerAided Design, pp. 523-528, 2008.

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TABLE III. Comparisons of Total Wire lengths for Different OARSMT Algorithms When Testcases Do Not Contain Obstacles Testcase

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Long [2]

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Ajwani [7]

Our Program

ind1 ind2 ind3 ind4 ind5 rc01 rc02 rc03 rc04 rc05 rc06 rc07 rc08 rc09 rc10 rc11 rt1 rt2 rt3 rt4 rt5 Normalized

10 10 10 25 33 10 30 50 70 100 100 200 200 200 500 1000 10 50 100 100 200 -

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 -

614 9100 590 1092 1314 25290 40100 52560 55850 72820 77886 106591 109625 109105 164940 233743 1817 44930 7677 7792 43335 1.00142

619 9100 590 1092 1304 25290 40630 52440 55720 71820 78068 107236 109059 108101 164450 235284 1817 46109 7777 7826 43586 1.00241

604 9100 587 1102 1307 25290 39920 53400 57020 73370 80057 109232 112787 112460 170270 245325 1817 45291 7811 7826 44809 1.02942

604 9100 587 1102 1307 25290 39920 53050 55380 72170 77633 106581 108928 108106 164130 233647 1817 44416 7749 7792 43026 0.99762

619 9100 590 1092 1304 25290 40400 52280 55310 71860 77492 107078 108866 107897 165190 234021 1817 46028 7719 7775 43383 1

[5] Naveed A. Sherwani, Algorithms for VLSI Physical Design Automation, Kluwer Academic Publishers, 1999. [6] Sabih H. Gerez, Algorithms for VLSI Design Automation, Wiley, 1998. [7] Gaurav Ajwani, Chris Chu, and Mak Wai-Kei, “FOARS: FLUTE Based Obstacle-Avoiding Rectilinear Steiner Tree Construction,” IEEE Transactions on ComputerAided Design of Integrated Circuits and Systems, vol. 30, no. 2, pp. 194-204, 2011. [8] Tao Huang and Evangeline F.Y. Young, “ObstacleAvoiding Rectilinear Steiner Minimum Tree construction: An Optimal Approach,” In Proceedings of International Conference on Computer-Aided Design, pp. 610-613, 2010. [9] Chih-Hung Liu, Shih-Yi Yuan, Sy-Yen Kuo, and YaoHsin Chou, “An O(n log n) Path-Based ObstacleAvoiding Algorithm for Rectilinear Steiner Tree Construction,” In Proceedings of Design Automation Conference, pp. 314-319, 2009. [10] Chih-Hung Liu, Shih-Yi Yuan, Sy-Yen Kuo, and JungHung Weng, “Obstacle-Avoiding Rectilinear Steiner Tree Construction Based on Steiner Point Selection,” In

Proceedings of International Conference on ComputerAided Design, pp. 26-32, 2009. [11] Chris Chu and Yiu-Chung Wong, “FLUTE: Fast Lookup Table Based Rectilinear Steiner Minimal Tree Algorithm for VLSI Design,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 1, pp. 70-83, 2008. [12] Takumi Watanabe, Hitoshi Kitazawa, and Yoshi Sugiyama, “A Parallel Adaptable Routing Algorithm and Its Implementation on a Two-Dimensional Array Processor,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, vol. 6, no. 2, pp. 241-250, 1987. [13] Barbara Chapman, Gabriele Jost, and Ruud van der Pas, Using OpenMP: Portable Shared Memory Parallel Programming, The MIT Press, 2008. [14] C. Y. Lee, “An Algorithm for Path Connections and Its Applications,” IRE Transactions on Electronic Computers, vol. EC-10, no. 3, pp. 346-365, September, 1961.