2008 INTERNATIONAL CONFERENCE ON PROGNOSTICS AND HEALTH MANAGEMENT
Early Detection of Interconnect Degradation Using RF Impedance and SPRT Daeil Kwon, Member, IEEE, Michael H. Azarian, Member, IEEE, Michael G. Pecht, Fellow, IEEE
Abstract— Many types of electronic products are now operating at higher frequencies or digital bit rates. At high frequencies, signal propagation is concentrated at the surface of interconnects, a phenomenon known as the skin effect. Degradation of interconnects, such as cracking of the solder joints due to fatigue or shock loading, also usually initiates at the surface and propagates inward. Therefore, even a small crack at the surface of an interconnect may change RF impedance and adversely affect the performance of high speed electronic circuits. Traditional methods used to monitor interconnect reliability are based on a measurement of DC resistance. But, more accurate and sensitive alternatives are required for monitoring the reliability of current and future electronic products. RF impedance analysis offers an improved means of sensing interconnect degradation. This study demonstrates the value of RF impedance measurements as an early indicator of physical degradation of solder joints compared to DC resistance measurements. Mechanical fatigue tests have been conducted with an impedance-controlled circuit board on which a surface mount component was soldered. Simultaneous measurements were performed of DC resistance and the time domain reflection coefficient as a measure of RF impedance while the solder joints were stressed. During the test, the RF impedance provided detectable failure precursors by the sequential probability ratio test (SPRT), while the DC resistance remained constant with no precursors. Failure analysis revealed that the change in RF impedance resulted from a physical crack that initiated at the surface of the solder joint and propagated only part of the way across the solder joint. These test results indicate that the combination of RF impedance and the SPRT can serve as a non-destructive early indicator of solder joint degradation. Index Terms— Impedance, Interconnection, Prognostics, Reliability, SPRT, Time domain analysis
A
I. INTRODUCTION
s clock speeds and communication frequencies rise, the performance and reliability of electronic products are becoming increasingly sensitive to the integrity of the interconnects that signals travel across. Common board-level Manuscript received May 19, 2008. This work is funded by the more than 50 members of the CALCE Electronic Products and Systems Consortium at the University of Maryland. Daeil Kwon is a graduate student in the Mechanical Engineering Department, University of Maryland, College Park, MD, 20742 (phone: 301-405-5323; fax: 301-314-9269; e-mail:
[email protected]). Michael H. Azarian is a research scientist in the Mechanical Engineering Department, University of Maryland, College Park, MD 20742 Michael G. Pecht is a professor in the Mechanical Engineering Department, University of Maryland, College Park, MD 20742
9778-1-4244-1936-4/08/$25.00 © 2008 IEEE
interconnects include solder joints, printed circuit board traces, component leads and connectors. These interconnects are susceptible to fatigue failures, which are generally initiated by cracks in the circumferential area where the strain range is maximized [1-4]. In order for reliability monitoring of electronic products, the industry has been using either event detectors or data loggers that basically monitor DC resistance [5]. Typically, the DC resistance provides an effective means of detecting a short or an open state of a conductor; however, it is not adequate to indicate the transitional states such as a partially degraded interconnect. Many efforts were made to detect the degradation of an interconnect using DC resistance [5-7]. Qi, et al. [5] discussed that the measurement technique influences the detection of failure of solder joints, and pointed out some limitations of detection methods using DC resistance. Caers, et al. [7] found that the resistance of a solder joint increased exponentially as a crack propagates, and the amplitude of the increase was in the range of microOhms. Since the resistance changes of an interconnect during degradation are so abrupt and small, DC resistance does not provide a useful means of detecting failure precursors, nor is it able to adequately detect the initial stages of interconnect degradation which may adversely affect the performance of high frequency electronic assemblies. Moreover, when DC resistance is used to assess the reliability of high speed systems, it may overestimate their lifetime, leading to errors in maintenance planning and the risk of unanticipated failures. Therefore, a new technique that takes account of the characteristics of high speed electronics is needed. At frequencies of several hundred MHz or more, even a small crack at the surface of an interconnect can directly influence signal integrity, which may reduce the performance of a high speed electronic products. At high operating frequencies, the signal propagation is concentrated at the surface of the interconnects – a phenomenon known as the skin effect. The skin depth refers to the thickness of the conductor within which approximately 63% of the current is contained [8]. As shown in equation (1), the skin depth, δ, is directly related to the frequency, f, and the resistivity of the conductor, ρ:
δ=
ρ f πμ0
where μ0 denotes the material’s permeability in a vacuum.
(1)
Impedance or Resistance
Due to the skin effect, RF impedance exhibits a response to physical degradation at the surface earlier than DC resistance. This early sensitivity can be quantified as an increase of the prognostic distance, the distance in time between the failure precursor and the failure [9]. Fig. 1 shows a conceptual representation of the increased prognostic distance of RF impedance (∆tRF-∆tDC) to physical degradation of the interconnects, relative to DC-based methods.
Failure criterion
ZRF
RDC
Increased prognostic distance
∆ tDC
∆tRF tf-∆tRF
tf-∆tDC
tf
resistivity, the length of the material, and cross-sectional area. The signal frequency affects the resistance because at high frequency the effective cross-sectional area of the conductor is reduced due to the skin effect. Reactance also depends on the frequency. Inductive reactance is proportional to the signal frequency, whereas capacitive reactance is inversely proportional to the frequency. Based on these relationships, the frequency range of an impedance measurement can be chosen in order to capture a desired set of attributes of the circuit. In order for impedance to exhibit enhanced sensitivity to interconnect degradation, the skin depth should be much less than the interconnect thickness. Fig. 2 describes the relationship between the frequency and the skin depth for copper and eutectic tin-lead solder compared to the typical dimensions of these two kinds of interconnects. According to Fig. 2, the skin depth for both copper and eutectic tin-lead becomes less than about a tenth of the interconnect thickness above approximately 500MHz. Since many commercial products are currently operating in the frequency range of a few gigahertz, in this study the monitored frequency window was chosen to be 500 MHz to 6 GHz.
Time 1000
Fig. 1. Conceptual representation of increased prognostic distance of RF impedance to interconnect degradation
II. METHODOLOGY A. Detection of interconnect degradation Impedance is a measure of the overall opposition of an electrical circuit to an alternating current at a given frequency [12]. It has three components: resistance, inductive reactance, and capacitive reactance. Resistance depends on the physical properties and dimensions of the conductor such as the
Skin depth (μm)
High frequency signal parameters, such as scattering parameters (or S-parameters) and RF impedance, have previously been used to characterize degraded interconnects [10][11]. These studies are focused on the ex-situ monitoring of defects or voids in an interconnect. However, the authors are aware of no published studies investigating the process of interconnect degradation using RF impedance, or quantifying the prognostic distance of the failure. In order to quantify the increased prognostic distance of RF impedance, a simple test vehicle that contains two solder joints was designed. Both RF impedance and DC resistance of the solder joints were simultaneously monitored by the sequential probability ratio test (SPRT) to identify failure precursors while cyclic stresses were applied to a surface mount technology (SMT) component to generate a fatigue failure of the solder joint. Application of the SPRT and simultaneous measurement of RF impedance and DC resistance allowed a quantitative comparison of their prognostic distances for the failure of solder joints. Failure analysis of degraded solder joints was conducted to observe the effect of physical degradation on the change of both RF impedance and DC resistance measurements at intermediate stages of solder joint failure.
Diameter of solder ball 100
Thickness of 1-oz copper Eutectic tin-lead
10 Copper 1
0 100k
1M
10M
100M
1G
10G
Frequency (Hz)
Fig. 2. Comparison between skin depth and interconnect dimensions
B. S-parameters and time domain reflectometry In high frequency applications, S-parameters are commonly used to characterize electrical performance. S-parameters can be measured by using a network analyzer to send high speed signals through the circuit and measure reflection (S11, S22) and transmission (S21, S12) coefficients over either the frequency or the time domain. A frequency domain measurement shows the effect of discontinuities present in the circuit as the amplitude of the reflected (S11) or transmitted (S21) signal across the frequency spectrum, although this measurement does not directly provide spatial localization of the discontinuities. On the other hand, a time domain measurement shows any discontinuities as discrete peaks with respect to their position in the circuit. This is useful in identifying fault locations. Fig. 3 offers a comparison between frequency and time domain analysis. In order to focus on the solder joint degradation that occurs at specified locations in the circuit, a time domain analysis was conducted. The independent variable, or x-axis, of the time domain plot is the round-trip transit time for electrical signals from the
network analyzer port to a particular location on the circuit. The signal will propagate at close to the speed of light. Therefore, the distance from a reference point (the end point where calibration has been conducted) to the peak location may be calculated by multiplying the speed of the electrical signal by half the measured signal transit time. In this study, signal transit time values are reported directly because locations of features of interest, such as solder joints, are readily identifiable. The dependent variable, or y-axis, of the time domain plot is the time domain reflectometry (TDR) reflection coefficient, which is essentially a ratio of the reflected power of the signal sensed at a port to that of the transmitted signal from the same port. A solder joint can be characterized by monitoring the reflection coefficient at the joint due to impedance discontinuities. The reflection coefficient is effectively equivalent to the S11 measurement; however, the time domain measurement is a composite response of all the frequencies monitored. The TDR reflection coefficient can range from -1 to 1, and may be conveniently reported in milliunits (mU).
Vector network analyzer
High speed signal 1
0.8
Reflection coefficient, S 11
Reflection coefficient, S 11
1
0.6 0.4 0.2 0
0.8 0.6 0.4 0.2 0
0.5
1
1.5
2
2.5
3
3.5
4
0
Frequency (GHz)
Fig. 3. Frequency domain analysis vs. time domain analysis C. Sequential probability ratio test The sequential probability ratio test (SPRT) is a statistical hypothesis test that determines whether the test data falls into the probability density distribution of the training data that serves as a base line [13][14]. The SPRT detects changes in the test data by conducting a statistical test in which null and alternative hypotheses are compared with each other. The null hypothesis is where the test data adheres to a Gaussian distribution with a mean of 0 and a variance of σ2 extracted from the training data, which represents the normal test data. The following four test cases are alternative hypotheses that represent abnormal test data: the positive mean test, the negative mean test, the normal variance test, and the inverse variance test. For the positive or negative mean test, the corresponding alternative hypotheses are that the test data adheres to a Gaussian distribution with a mean of +M or –M and a variance of σ2, respectively, where M is a system disturbance level determined by the user. For the normal or inverse variance test, the corresponding hypotheses are that the
test data adheres to a Gaussian distribution with a mean of 0 and a variance of Vσ2 or σ2/V, respectively, where V is a scalar factor related to the detection sensitivity. The positive mean test, for example, evaluates whether the mean of the test data is shifted by M in the positive direction, which indicates the system is degrading. An SPRT index is the logarithm of the ratio of the probability that the alternative hypothesis is true to the probability that the null hypothesis is true. Given the null and alternative hypotheses, the SPRT index is
SPRT =
M
σ
2
n
⎛
∑ ⎜⎝ x k =1
k
−
M⎞ ⎟ 2 ⎠
(2)
where xk represents sequential observations of the test data. The SPRT index is continuously calculated and compared to the lower and upper threshold limits which are set by the user and related to the sensitivity of detection. When the SPRT index is less than the lower boundary, it can be concluded that the test data is normal; RF cable with open termination when the SPRT index is greater than the upper boundary, the alternative hypothesis is accepted, which indicates that the test data has become abnormal. Thus, the use of the SPRT in 2 4 6 8 10 monitoring the RF Signal transit time (ns) impedance and DC resistance can help identify any changes in the parameters due to interconnect degradation, prior to the failure. III. EXPERIMENT A. Apparatus The test apparatus consists of the following: an impedance-controlled circuit board with an SMT low pass filter, two bias-tees, RF cables, a mechanical load unit, and measurement instruments. The test circuit for simultaneous measurement of the RF impedance and the DC resistance is shown in Fig. 4. The circuit board has a controlled characteristic impedance of 50 Ohms to match that of the test equipment, cables, and other components. A surface mount low pass filter was soldered to this circuit board. The cut-off frequency of the low pass filter is 6.7 GHz. Since the monitored frequency range in this study is between 500 MHz and 6 GHz, the filter acts as a conductor with the same characteristic impedance of 50 Ohms. A ceramic material was inserted between the metal tip of the force transducer and the filter to avoid electrical contact where the probe tip touches the filter.
Vector Network Analyzer SMT low pass filter (LPF) on 50 Ohms controlled impedance board
Bias-Tee RF RF+DC
varied between 30 N and 50 N in a sinusoidal wave form within a period of four seconds. The offset force maintained contact between the component and the force transducer throughout the entire fatigue cycle, and the oscillatory force corresponded to the amplitude of the sinusoidal force superimposed on the offset force.
DC
LPF
Bias-Tee DC RF RF+DC
Fig. 4. Schematic of the circuit for simultaneous monitoring of the RF and the DC responses
In order to allow simultaneous monitoring of the RF impedance and the DC resistance, bias-tees were incorporated into the test circuit. The bias-tees extract or combine the RF and DC signals. The DC and the RF measuring instruments were connected to the DC and the RF ports of the bias-tees, respectively, while the composite ports were connected to both ends of the circuit board. All connections were made using RF cables, which also had a characteristic impedance of 50 Ohms. As seen in Fig. 4, a Keithley 2010 7.5 digit multimeter and an Agilent E8364A vector network analyzer (VNA) were used to monitor the DC resistance and the RF impedance, respectively. The VNA had a frequency range of 45 MHz to 50 GHz and was configured with TDR functionality. Both instruments were externally monitored to allow automated data acquisition. An MTS Tytron 250 was used to apply a cyclic shear force to the solder joint in order to generate fatigue failures. The MTS Tytron 250 is a uniaxial micro-tester that has a load capacity of 250 N and a load resolution of 0.001 N. According to the user’s needs, various load profiles can be programmed; e.g., a cyclic shear force to generate fatigue failure or a monotonically increasing force to measure the strength of a material. B. Load profile In order to determine an appropriate force level for the fatigue tests, the shear strength of the solder joint was measured using a circuit board with an SMT component. The Tytron 250 applied and measured the shear force directly to the component at a constant displacement rate until the solder joints failed. In the experiment, however, the failure mode was copper pad separation from the circuit board rather than cracking of the solder joints. In order to avoid copper pad separation during the shear strength measurement, the SMT component was soldered onto the ground plane of the same circuit board. The shear strength of the solder joint was identified to be about 125 N, averaged over multiple trials. Based on the shear strength measurement and several tests under various load levels, an offset force of 40 N and an oscillatory force of 10 N at a frequency of 0.25 Hz were chosen as optimal in order to produce fatigue cracking of the solder joints of the test vehicle. As a result, the cyclic shear force
C. RF and DC data acquisition Both the RF and the DC responses were collected every 30 seconds. Instrumental control software was used to instruct the multimeter to collect the DC resistance measurements periodically. At the same time, the TDR reflection coefficients over the entire time domain of the test circuit were collected as a measure of RF impedance. A single TDR acquisition contains the multiple reflection coefficient values over the part of the signal path defined by the user. In order to compare to the DC resistance measurements, the TDR reflection coefficients from the failure site were extracted and plotted as a function of time of exposure to mechanical stress. Each experiment was conducted until it resulted in a DC open circuit or until the TDR reflection coefficient increased significantly. IV. RESULTS A. TDR reflection coefficient over the time domain The TDR reflection coefficient at particular points of interest needed to be extracted from the overall time domain plot. Fig. 5 shows two measurements of the TDR reflection coefficient over the signal transit time domain: one taken prior to the application of the cyclic stress and the other after completion of a fatigue test. The physical locations corresponding to the peaks were identified experimentally through association with known features in the circuit. The change in amplitude of the peak was a response from the failure site, which was visually confirmed to be a cracked solder joint. 700 TDR reflection coefficient (mU)
Digital multimeter
600 Sample with failed solder joint
500 400
TDR reflection coefficient at the failure site
300 200 100
Sample with intact solder joint
0 8
8.5
9
9.5
10
10.5
11
Signal transit time (ns)
Fig. 5. The TDR response before and after the experiment
B. Comparison between RF and DC responses Fig. 6 shows the results of one such fatigue test experiment, which compares the TDR reflection coefficient at the failure site with the DC resistance. The total duration of this test was
8 DC open circuit at 1303 min RF precursor w/ SPRT at 1109 min
40
7
No DC precursor w/ SPRT
30
6 TDR reflection coefficient at the failure site
20
5 DC resistance
10
DC resitance (Ohms)
TDR reflection coefficient (mU)
50
4
0
3 0
200
400
600
800
1000
1200
1400
Test time (min)
Table 1 shows a summary of other test results with prognostic distance calculations. In every case, the SPRT detected RF failure precursors prior to the separation of the solder joints; while no DC failure precursors were observed. The prognostic distances show a little variation depending on a few test conditions that were not controlled such as the amount of solder and the point of load probe contact. These experiments confirm that the test results were qualitatively repeatable. C. Failure analysis of degraded solder joint Fig. 7 shows the result of another fatigue test comparing the TDR reflection coefficient at the failure site with the DC resistance. As described in the previous section, both DC and RF responses remained around their initial values at the beginning of the test, but the RF response began to increase as the solder joints were stressed. The SPRT detected an RF failure precursor at 221 minutes, and no DC failure precursor, during the test. The diurnal variation was not observed since this test was stopped after only 309 minutes of operation before the solder joint failed completely, in order to investigate the intermediate stages of solder joint degradation. Failure analysis was conducted to study the effect of solder joint degradation on RF impedance changes. Upon conclusion of the test the circuit board was inspected under the scanning electron microscope (SEM) to identify any damage to the solder joints. As shown in Fig. 8, the SEM image reveals an externally visible crack along the interface between the component and circuit board. This partially degraded solder joint sample was used to relate the failure mechanism and the extent of damage to the changes in RF response. The sample was potted in epoxy and cross-sectioned to reveal one of the solder joints on a plane orthogonal to the long axis of the filter, as shown in Fig. 9.
Fig. 6. Comparison between RF and DC responses with their precursor detections using the SPRT during the fatigue test
Test
Time to DC open circuit (min)
RF failure precursor (min)
1 2 3 4 5 6 7 8 9 10 11
337 1303 1210 974 431 407 866 1557 574 411 3633
335 1103 1041 826 415 253 503 1504 430 408 3612
Prognostic distance (min)
(%)
2 200 169 148 16 154 363 53 144 3 21
0.59 15.35 13.97 15.20 3.71 37.84 41.92 3.40 25.09 0.73 0.58
8 The test was stopped at 309 min
TDR reflection coefficient (mU)
Table 1 Summary of test results with prognostic distance calculations
180 RF precursor w/ SPRT at 221 min
170
7
No DC precursor w/ SPRT
160
6
150
5
TDR reflection coefficient
140
DC resistance (Ohms)
about 1303 minutes. Both the TDR reflection coefficient and the DC resistance were collected every 30 seconds until the applied stress resulted in a DC open circuit. The SPRT was applied to both the TDR reflection coefficient and the DC resistance individually. The data points from 0 to 200 minutes of each parameter in a test were taken for the training data, respectively. At the beginning of the test, both measurements remained close to their initial values. The SPRT detected an RF failure precursor, an increase in the TDR reflection coefficient, at 1109 minutes, 194 minutes prior to the DC open circuit, which signaled separation of the solder joint. This precursor corresponds to about 15% remaining life, considering the entire test time at which the solder joints were separated. On the other hand, the DC resistance remained almost constant until it exhibited a sudden increase, indicating a DC open circuit. However, the SPRT triggered alarms between 718 and 1179 minutes. These were identified to be the effect of a diurnal variation that resulted from the changes in the ambient temperature. Analysis of the data showed that no DC failure precursors were observed by the SPRT prior to failure of the solder joint.
4 DC resistance
130
3 0
50
100
150
200
250
300
350
Test time (min)
Fig. 7. Comparison between RF and DC responses during the fatigue test
Fig. 10 shows cross-sectional SEM images of the degraded solder joint. A crack that initiated at the surface and propagated inward was clearly observed. The one side of the solder joint where the shear force was applied began to open towards the center, consistent with the direction of the applied shear force,
as seen in Fig. 10(b), while the opposite side of the solder joint was still intact, as shown in Fig. 10(c). Analysis of the figures revealed that the crack growth was about half the length of the solder joint. By this time, the TDR reflection coefficient had increased by 4 mU which was enough for the SPRT to detect it, but the DC resistance remained at its initial value. This provides clear evidence that RF impedance is more sensitive than DC resistance in detecting interconnect degradation due to the skin effect.
Shear force direction Low pass filter
Solder joint Low pass filter
Copper pad
Crack
Solder joint
(b)
Low pass filter Crack
Circuit board
Solder joint Copper pad
Fig. 8. SEM image of the degraded solder joint
Cross-sectioning direction Solder joint
SMT low pass filter Copper trace
V. DISCUSSION
Board
Plane of cross-section
Fig. 9. Cross-sectioning direction and plane of observation
Low pass filter Shear force direction
Solder joint
Crack
(a)
(c) Fig. 10. Cross-sectional SEM image of (a) overview (b) close-up on the left, and (c) close-up on the right
Copper pad
This study demonstrated that RF impedance is a useful parameter for monitoring circuit impedance changes to detect interconnect degradation, and provides an earlier warning in response to solder joint degradation than DC resistance. The combination of an impedance controlled circuit board with an SMT low pass filter and two bias-tees was an appropriate test vehicle for monitoring RF and DC responses simultaneously. Furthermore, the SPRT was able to identify failure precursors from the RF impedance and to quantify the prognostic distance. These test results imply that reliability assessment based on DC resistance measurements may overestimate the lifetime of high speed electronic assemblies. Currently, reliability data on printed circuit board assemblies are often obtained by monitoring the DC resistance of daisy-chained components using data loggers or event detectors. For products whose performance is dependent on the transmission of signals with a frequency of several hundred MHz or more, even a small, partial crack may degrade the high speed signal integrity, while it does not affect a low speed signal such as DC resistance. Therefore, DC resistance may overestimate the time-to-failure and thus predict longer lifetimes than would be experienced
during product use. RF impedance can provide a more accurate assessment of the reliability of high speed electronic products in response to solder joint cracking. Currently, these RF measurements are being performed with laboratory equipment, such as a vector network analyzer that is multi-functional and has a very high performance and consequently may be two orders of magnitude more expensive than the equipment needed for resistance monitoring. Eventually, an improved understanding of the correlation between RF characteristics and interconnect degradation should allow simplification of RF monitoring tools. This may involve measurement of specific parameters, such as the signal strength at a specific frequency or the bit error rate. The equipment needed for this purpose may be an order of magnitude less expensive, more widely available, and even feasible to implement in the field as opposed to the laboratory. Ultimately, one can envision reducing the RF-based detection of interconnect degradation to the board or die level. This would require an investment of time and expense for development, but would drastically reduce the per-unit cost. Furthermore, it would create the opportunity for real-time detection and early warning of interconnect degradation, allow condition-based maintenance, and reduce unplanned down-time. This could bring potentially substantial savings in operational and repair costs, help reduce the incidence of “no trouble found” failures due to intermittent contact behavior, and improve product safety and availability.
the solder joint. A robust and dependable means such as this for detecting failure precursors in interconnects, even with a short prognostic distance, holds out the potential for removing critical hardware from service prior to a catastrophic failure. Furthermore, solder joint reliability tests halted upon observation of specified increases in RF impedance provide an opportunity to study various stages of crack propagation in detail prior to complete separation of the solder joint. Studies such as this can lead to insights into the mechanisms of damage accumulation in interconnects. Future work on this topic will involve an investigation of alternative mechanical and thermal loading conditions, identification of the minimum crack size that can be detected with RF impedance using the SPRT, and testing of more complex test vehicles and interconnect structures. ACKNOWLEDGMENT This work was funded by more than 50 members of the CALCE Electronic Products and Systems Consortium at the University of Maryland. REFERENCES [1] [2]
[3]
VI. CONCLUSIONS A technique for detecting interconnect degradation using RF impedance and the SPRT has been presented in this study. A test vehicle was developed to allow direct comparison of RF impedance and DC resistance in order to monitor the degradation of the solder joint. The SPRT was used to detect possible failure precursors in both RF and DC responses. This study revealed that the RF impedance provided detectable failure precursors due to solder joint degradation, while the DC resistance did not. An analysis of 11 separate fatigue tests showed that the results of this study are qualitatively repeatable and consistent. In every case, RF impedance combined with the SPRT provided early warning of solder joint failure, with a prognostic distance ranging from half a percent to over 40% of total life. Failure analysis of a degraded solder joint was performed after the detection of the RF failure precursor using the SPRT, in the absence of a change in the DC resistance. The physical crack was found to have extended only part of the way across the solder joint. The direction of the crack propagation coincided with that of the applied shear force. It was confirmed and demonstrated that RF impedance exhibits earlier sensitivity to interconnect degradation than does DC resistance. Therefore, RF impedance analysis can serve as a non-destructive early indicator of solder joint degradation. This technique shows potential as a prognostic tool that can provide advanced warning of impending interconnect failures. As shown in the failure analysis of the degraded solder joint, an increase in RF impedance is associated with a physical crack in
[4] [5]
[6] [7]
[8] [9] [10]
[11] [12] [13]
Pecht, M., McCluskey, P. and, Evans, J., Failures in Electronic Assemblies and Devices, London: Springer-Verlag, 2001, pp. 204-232. Cuddalorepatta, G., and Dasgupta, A., “Creep and Stress Relaxation of Hypo-Eutectic Sn3.0Ag0.5Cu Pb-free Alloy: Testing and Modeling,” ASME International Mechanical Engineering Congress and Exposition, Seattle, WA, 2007, pp. 1-9. Andersson, C., Andersson, D., Tegehall, P., Liu, J., “Effect of Different Temperature Cycle Profiles on the Crack Propagation and Microstructural Evolution of Lead Free Solder Joints of Different Electronic Components,” 5th Int. Conf. on Thermal and Mechanical Simulation and Experiments in Micro-electronics and Micro-systems, Brussels, Belgium, 2004, pp. 455-464. Lau, J., Solder Joint Reliability – Theory and Applications, New York: Van Norstrand Reinhold, 1991, pp. 545-587. Qi, H., Vichare, N., Azarian, M., Pecht, M., “Analysis of Solder Joint Failure Criteria and Measurement Techniques in the Qualification of Electronic Products,” IEEE Trans. on Components and Packaging Technologies, vol. 31, no. 2, 2008, pp. 469-477. Constable, J. H., Lizzul, C., “An Investigation of Solder Joint Fatigue Using Electrical Resistance Spectroscopy,” IEEE Trans. on Components and Packaging Technologies, vol. 18, no. 1, 1995, pp. 142-152. Caers, J. F. J. M., Wong, E. H., Seah, S. K. W., Zhao, X., J., Selvanayagam, C. S., Driel., W. D.van, Owens., N., Leoni, M., Tan, L. C., Eu, P. L., Lai, Y., Yeh, C., “A Study of Crack Propagation in Pb-free Solder Joints under Drop Impact,” Electronic Components and Technology Conference, Orlando, FL, 2008, pp. 1166-1172. Thierauf, S. C., High-Speed Circuit Board Signal Integrity, Massachusetts: Artech House Inc., 2004, pp. 17-30. N. Vichare, and M. Pecht, “Prognostics and Health Management of Electronics,” IEEE Transactions on Components and Packaging Technologies, Vol. 29, No. 1, 2006, pp. 222–229. Ghaffarian, R., Nelson, G., Copper, M., Lam, L. D., Strudler, S., Umdekar, A., Selk, K., Bjorndahl, B., “Thermal Cycling Test Results of CSP and RF Package Assemblies,” International Conference of Surface Mount Technology Association, 2000, pp. 850-857. Foley, S., Floyd, L., Mathewson, A., “A Novel Fast Technique for Detecting Voiding Damage in IC Interconnects,” Microelectronics Reliability, vol. 40, 2000, pp. 87-97. Ulrich, R. K., Brown, W. D., Advanced Electronic Packaging, New Jersey : Wiley-Interscience, 2006, pp. 487-536. Humenik, K., and Gross, K., "Sequential Probability Ratio Tests for Reactor Signal Validation and Sensor Surveillance Applications," Nuclear Science and Engineering, Vol. 105, 1990.
[14] Gross, K., and Lu, W., “Early Detection of Signal and Process Anaomalies in Enterprise Computing Systems,” IEEE Int’l Conf. on Machine Learning and Applications, Las Vegas, NV, 2002. Daeil Kwon (M’ 07) is currently working towards a Ph.D. degree in the Center for Advanced Life Cycle Engineering (CALCE) at the University of Maryland, College Park. He received a Bachelors degree in Mechanical Engineering from POSTECH, Republic of Korea. Michael H. Azarian (M’ 96) received the B.S. degree in chemical engineering from Princeton University, Princeton, NJ and the M.S. degree in metallurgical engineering and materials science and the Ph.D. degree in materials science and engineering from Carnegie Mellon University, Pittsburgh, PA. He is a research scientist with the Center for Advanced Life Cycle Engineering (CALCE), University of Maryland, College Park. His research on reliability of electronic products has led to publications on electrochemical migration, capacitor reliability, electronic packaging, and tribology. He is Technical Editor of the draft IEEE standard 1624 on organizational reliability capability, for assessing suppliers of electronic products. He holds five U.S. patents for inventions in data storage and contamination control. Before joining CALCE, he spent 13 years in the data storage, advanced materials, and fiber optics industries. Michael G. Pecht (F’92) received the B.S. degree in acoustics, the M.S. degree in electrical engineering, and the M.S. and Ph.D. degrees in engineering mechanics from the University of Wisconsin, Madison. He is the Founder of the Center for Advanced Life Cycle Engineering (CALCE) and the Electronic Products and Systems Consortium, University of Maryland, College Park. He is Chief Editor for Microelectronics Reliability. He has been leading a research team in the area of prognostics for the past ten years, and has now formed a new Electronics Prognostics and Health Management Consortium at the University of Maryland. He has consulted for over 50 major international electronics companies, providing expertise in strategic planning, design, test, prognostics, IP, and risk assessment of electronic products and systems. He has written 18 books on electronic products development, use, and supply chain management. Dr. Pecht received the IEEE Society’s Lifetime Achievement Award, the 3M Research Award for electronics packaging, the IEEE Undergraduate Teaching Award, and the IMAPS William D. Ashman Memorial Achievement Award for his contributions in electronics reliability analysis. He is an ASME Fellow. He served as Chief Editor of the IEEE Transactions on Reliability for eight years and on the advisory board of IEEE Spectrum. He is an Associate Editor for the IEEE Transactions on Components and Packaging Technologies.