S-parameters were measured using an HP8753D network analyzer. One end of inductor was connected to port 1 and another end was connected to the ground.
This is the Pre-Published Version
Experimental Results and Simulation of Substrate Noise Coupling via Planar Spiral Inductor in RF ICs Alan Pun, Tony Yeung, Jack Lau, Francois J.R. Clement*, David Su+ Dept. of EEE, The Hong Kong University of Science and Technology, Hong Kong, China *Swiss Federal Institute of Technology, Lausanne, Switzerland +Hewlett-Packard Laboratory, Palo Alto, CA, USA
Abstract While previous studies [3] on substrate coupling focused mostly on noise induced through drain-bulk capacitance, substrate coupling from planar spiral inductors at radio frequency via the oxide capacitance have not been reported. This paper presents experimental data and simulation results for inductorinduced noise in the substrate. Noise coupling from conventional and hollow inductors via the substrate to P+ diffusions with and without guard rings were also examined. A compact model of the inductor and substrate that can accurately match the measured inductor-induced noise is then derived. Using the inductorsubstrate model, we investigated the effectiveness of various guard rings configurations to reducing substrate noise coupling, the trade-off between noise coupling and self-inductance, and the coupling of noise from the inductor of a tuned RF amplifier.
Introduction In the past few years, we have witnessed an increasing interest in integrating inductors on analog radio frequency chips. Thanks to great advances in multi-layer metal processing and a higher frequency requirement, we have been able to integrate inductors of reasonable qualities. One of the driving forces in the aggressive pursuit of inductors is certainly to attain higher integration. An unfortunate by-product that comes along with a higher integration is a higher susceptibility to interference. One
such interference is substrate noise. Most of the reports in substrate noise have been done at lower frequencies or done on nonepitaxial wafers. In addition, the studies were mainly done on noise generation via junction capacitance [1]-[3]. In this report, we focus on the potential of substrate noise induction through spiral inductors.
Experimental Setup The cross-section and the basic structure of the measurement setup are shown in Fig. 1. Planar spiral inductor of size 350µm by 350µm is formed with layer 3 metal in a 0.8-µm epitaxial technology fabricated through MOSIS. S-parameters were measured using an HP8753D network analyzer. One end of inductor was connected to port 1 and another end was connected to the ground. P+ diffusion contacts were connected to port 2 of the analyzer. The scattering parameter S21 was measured to determine the isolation between the inductor (noise source) and P+ diffusion contact (sensor). The distance from the center of inductor to the P+ diffusion contact and the inductor edge are denoted by d and r respectively. The test chip is mounted on a two-sided copper board using nonconductive epoxy. The top side has a 50Ω lines connected to SMA connectors while the bottom side acts as a ground plane. Before any measurement takes place, standard TRL calibration was done to cancel the transmission line effect.
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Fig. 1. Measurement setup and cross-section of the substrate.
Fig. 2. Doping profile of the substrate from spreading resistance analysis. This profile is used for simulation.
Simulation Methodology Precise modeling of substrate noise is often difficult due to the distributive nature of the substrate and the particulars of a specific layout. In order to have a better understanding of the substrate noise propagation, we verified our experimental data with that of a finite difference simulation. The doping profile shown in Fig. 2 was obtained using spreading resistance analysis. This profile is important for extracting an accurate substrate model by LAYIN [4]. The substrate model is then passed to SPICE for noise simulation. While the exact details of the distributive nature of the substrate is hard to picture, a simplified equivalent circuit in Fig. 3 can elucidate the idea. Capacitor Cox, which is about 1pF for a 4-µm thick oxide, is far greater than that contributed by the substrate capacitance Cepi and Csi. In order to verify this fact, we have calculated the associated substrate capacitance for each resistor grid after extracting the substrate resistive grid. Simulations with and without the substrate capacitance showed no difference in the substrate noise.
variation of S21 is less than 2dB as distance d varies from 200µm to 1200µm at 500MHz with peripheral guard ring floated. The size of the inductors are quite large and certainly greater than four times the distance of the thickness of the epitaxial layer. In earlier work [1], it has been shown that for epitaxial wafer, substrate noise at a distance less than four times the epitaxial thickness depends on the actual distance. Beyond that, the epitaxial layer can be treated as an equal-potential node, and the substrate noise is invariant with distance separation. B.
Effect of operating frequency
S21 parameters between the inductor and the P+ diffusion contact at different frequencies are measured and simulated. The P+ diffusion point is at 1200µm away from the inductor. The distance is chosen to guarantee that the substrate noise has little distance dependence. The frequency is swept from 30kHz to 3GHz. Data were collected in both the presence and absence of a 50-µm wide peripheral guard rings that surrounds the inductor. 0
Results & Discussions A.
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Effect of physical separation
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Distance separation between the noise source and the sensor has little effect in reducing noise. As shown in Fig. 4, the
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Fig. 5. Measurement and simulation of S21 vs. frequency at d=1200µm for peripheral guard ring floated and grounded.
Fig. 3. Equivalent lumped circuit of the experiment setup. -25
Measurement Simulation
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Fig. 4. Measurement and simulation of S21 vs. distance d under the conditions of peripheral guard ring floated and at 500MHz.
Fig. 6. Measured inductor self-resonant frequency for peripheral guard ring floated (marker 1) and grounded (marker 2).
As indicated in Fig. 5, the measured noise at frequency below 1GHz is reduced by 25dB when the peripheral guard rings is grounded. The noise coupling increases by 20dB per decade of frequency, indicating that the coupling is mostly due to ωCox. As frequency appoaches a few GHz, the S21 begins to flat out due to the parasitic inductance in the setup. Guard ring remains effective in reducing the noise by 10dB at high frequency. The inductor self-resonant frequency drops greater than 40% when the peripheral guard ring is grounded. It is because the effective capacitance to ground is bigger. Figure 6 shows the measured S11 which indicated inductor self-resonant frequency are 2.9GHz and 1.69GHz for peripheral guard ring floated and grounded respectively.
out any guard ring has a simulated inductance of 2 nH. With the guard ring grounded, the inductance value decreases dramatically as the guard ring move inward into the inductor. The effect of the guard ring becomes void as it approaches the center of the inductor. The substrate noise is smaller in the hollow case because the Cox underneath the hollow inductor is less than that of the solid inductor. In order to reduce the eddy current that flows in the substrate, broken guard ring is employed. Figure 9 reveals that a half-broken guard ring (50% area) can reduce noise significantly while inductance drops by only 8%.
C.
The inductor-substrate model derived above can be used to predict the inductor-induced noise coupling from a narrowband tuned amplifier, which is a key building block for RF power amplifier. As shown in Fig. 10, the tuned-amplifier has an onchip inductor Ls that resonates with capacitor Cs at 600MHz. The Ls substrate is connected to the P+ contact via the substrate equivalent network. With a Vdd of 5V, an amplifier in class-B operation can have a maximum peak-to-peak output voltage as large as 10V. This large output voltage across inductor Ls can
Effect of inductor guard ring
Placing the guard ring closer to the inductor can reduce the substrate noise. Unfortunately, mirror effect degrades the inductance value. An EM field simulator [5] is used to detect the inductance reduction as a function of guard ring distance. Figure 7 and 8 compare the simulated self-inductance and S21 for solid and hollow inductors when the distance from the guard ring to the center of the inductor changes. In both cases, inductor with-45
Design Considerations
2.0 Inductance S21 at 1GHz
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Fig. 9. Simulation results of inductance and S21 for broken guard ring at d=175µm. Three turns 2nH inductor of size 350µm by 350µm, 40µm line width, 7µm spacing and 1.2µm metal thickness.
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Fig. 7. Simulation results of inductance and S21 for solid inductor at d=300µm. Five turns 2nH inductor of size 180µm by 180µm, 15µm line width, 1µm spacing and 1.2µm metal thickness.
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Fig. 8. Simulation results of inductance and S21 for hollow inductor at d=300µm. Two turns 2nH inductor of size 260µm by 260µm, 15µm line width, 1µm spacing and 1.2µm metal thickness.
DC bias
Fig. 10. Schematic of power amplifier for inductor (Ls) substrate noise analysis.
Conclusions The experimental results and simulation verifications provide an understanding of the noise coupling effect of planar spiral inductor in a heavily doped silicon substrate. Substrate noise could be a major obstacle to integrate noise sensitive RF circuits. Guard ring can reduce noise but mirror effect will reduce the inductance and hurt the self-resonant frequency. Simulation reveals that hollow inductors have advantages in reducing inductor induced substrate noise as compared with conventional inductors. Broken guard ring can help reduce the substrate eddy current induced by the inductor and hence reducing the noise while maintaining the inductance value.
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induce significant amount of noise in the substrate. Transient simulation results of noise coupling from inductor Ls to a P+ substrate contact at d=300µm is shown in Fig. 11. The noise voltage at P+ is about 130mVpp with 45 degrees of phase shift. The corresponding FFT analysis shown in Fig. 12 indicates an isolation of -40dB at fundamental frequency. Figure 13 reveals that the noise coupling increase more and more at higher harmonic frequencies. These results show that inductor-induced noise can be a major obstacle to integating RF power amplifier with sensitive RF receiver circuits on the same die.
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Fig. 11. Transient analysis of noise coupling from the power amplifier inductor (Ls) to P+ at d=300µm.
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Acknowledgments We would like to thank Louis Tsui, Frankie Hui, Zhiheng Chen, P.H. Yin and Felix Wong of The Department of Electrical & Electronic Engineering at the Hong Kong University of Science & Technology for their assistance. A special acknowledgment is extended to Y.K. Leung and Prof. Simon Wong at the Center for Integrated Systems at Stanford University for providing spreading resistance analysis.
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References
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Fig. 12. FFT analysis of noise coupling from the power amplifier inductor (Ls) to P+ at d=300µm.
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[1] D. K. Su, M. J. Loinaz, S. Masni, B. A. Wooely, “Experimental results and modeling techniques for substrate noise in mixed signal integrated circuits”, IEEE Journal of Solid- State Circuits, vol. 28, April 1993, pp. 420-430. [2] K. Jordar, “A simple approach to modeling cross-talk in integrated circuits”, IEEE Journal of Solid- State Circuits, vol. 29, no. 10, October 1994, pp. 1212-1219. [3] T. Blalack, J. Lau, F. J.R. Clement, B. A. Wooley, “Experimental results and modeling of noise coupling in a lightly doped substrate”, Proc. IEEE International Electron Devices Meeting, San Francisco, CA, U.S.A., 1996. [4] F.J.R. Clement, E. Zysman, M. Kayal, M. Declercq, “LAYIN: LAYout Inspection CAD Tool Dedicated to the Parasitic Coupling Effects through the Substrate Integrated Circuits”, Power and Timing Modeling Optimization and Simulation, 1995. [5] Maxwell 3D Parameter Extractor User’s Reference, Ansoft Corporation.
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Fig. 13. Isolation between the power amplifier inductor (Ls) to P+ at d=300µm.
