Fabrication of gated cathode structures using an in situ grown vertically aligned carbon nanofiber as a field emission element M. A. Guillorna) and M. L. Simpson Department of Electrical and Computer Engineering, University of Tennessee, Knoxville, Tennessee 37996 and Instrumentation and Controls Division, Oak Ridge National Laboratory, Oak Ridge, Tennessee 37831
G. J. Bordonaro Cornell Nanofabrication Facility, Cornell University, Ithaca, New York 14853
V. I. Merkulov Solid State Division, Oak Ridge National Laboratory, Oak Ridge, Tennessee 37831
L. R. Baylor Fusion Energy Division, Oak Ridge National Laboratory, Oak Ridge, Tennessee 37831
D. H. Lowndes Solid State Division, Oak Ridge National Laboratory, Oak Ridge, Tennessee 37831
共Received 25 October 2000; accepted 5 February 2001兲 Vertically aligned carbon nanofibers 共VACNFs兲 are extremely promising cathode materials for microfabricated field emission devices, due to their low threshold field to initiate electron emission, inherent stability, and ruggedness, and relative ease of fabrication at moderate growth temperatures. We report on a process for fabricating gated cathode structures that uses a single in situ grown carbon nanofiber as a field emission element. The electrostatic gating structure was fabricated using a combination of traditional micro- and nanofabrication techniques. High-resolution electron beam lithography was used to define the first layer of features consisting of catalyst sites for VACNF growth and alignment marks for subsequent photolithography steps. Following metallization of these features, plasma enhanced chemical vapor deposition 共PECVD兲 was used to deposit a 1-m-thick interlayer dielectric. Photolithography was then used to expose the gate electrode pattern consisting of 1 m apertures aligned to the buried catalyst sites. After metallizing the electrode pattern the structures were reactive ion etched until the buried catalyst sites were released. To complete the devices, a novel PECVD process using a dc acetylene/ammonia/helium plasma was used to grow single VACNFs inside the electrostatic gating structures. The issues associated with the fabrication of these devices are discussed along with their potential applications. © 2001 American Vacuum Society. 关DOI: 10.1116/1.1358855兴
I. INTRODUCTION Microfabricated field emission 共FE兲 devices1 are finding application in a variety of areas from miniature mass spectrometers2 and pressure sensors3 to consumer products such as full color flat-panel displays.4 Even vacuum electronics, in micro-5 and nanoscale6 forms, is of increasing interest due to the inherent advantages of electron transport in a vacuum. The electron emitter is of primary importance in any FE device. These cathodes must be long-lived, stable, and possess a low threshold voltage for the initiation of FE. Furthermore, inexpensive mass fabrication of these devices is required for many commercial applications. FE from many different forms of carbon has been an area of intense study over the past decade.1 Recently, we have investigated the FE properties of a variety of these materials7–9 including very smooth energetic-beamdeposited undoped and Cs-doped amorphous diamond (a-D) films; nanocrystalline mainly graphitic films, hot-filament chemical vapor deposition 共CVD兲 films on a flat substrate, a兲
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shock-synthesized nanodiamond 共ND兲 powder; a-D film or ND powder deposited on flat silicon substrates and on pulsed-laser-processed silicon micropillars; and vertically aligned carbon nanofibers 共VACNFs兲.10–13 Our experiments show that the nanostructure of particular carbon-based FEs can provide an exceptional enhancement of the local electric field. For example, VACNFs are extremely promising cathode materials for FE cathodes, precisely because they are intrinsically robust, nanostructured, high-aspect-ratio conductors of electrons as a result of their synthesis process. Recent progress10,13 with the growth of the VACNFs has illuminated a unique advantage that likely will permit VACNFs to surpass other forms of carbon for fabrication of large arrays of FE cathodes. VACNF growth is catalytically controlled so that the presence or absence of a fiber at a given location is completely determined by catalyst predeposition. By lithographically patterning catalyst deposition, and by appropriately controlling subsequent plasma etching and growth conditions, fiber growth becomes completely deterministic10 allowing one to control the location, height, and diameter of the VACNF. Consequently, VACNFs can be
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grown as isolated individual cathodes and in very large patterned arrays.10 To our knowledge, this article presents the first known incorporation of single, in situ grown VACNFs into actual device structures: gated cathodes where the VACNF will function as the FE element. This work demonstrates that single VACNFs can be grown in 1:1 aspect ratio microfabricated wells via the dc plasma enhanced CVD 共PECVD兲 process that was recently reported.10 This technique does not rely on any novel fabrication procedures beyond the dc PECVD growth of the VACNF. Consequently, we believe that wafer scale production of VACNF-based microfabricated FE devices will become possible for a variety of applications including nanolithography, field emission displays, and vacuum microelectronics. II. FABRICATION A. Fabrication of the electrostatic gating structure
An overview of the fabrication process for the gated cathode structures is provided in Fig. 1. A hybrid lithography process combining both high-resolution direct write electron beam lithography 共EBL兲 and photolithography techniques was used to perform the patterning of these structures. A combination of physical vapor deposition 共PVD兲 and PECVD techniques were used for materials deposition and growth. Liftoff metallization and reactive ion etching 共RIE兲 were used as the primary means of pattern transfer. 4 in. low resistivity n-type wafers with no passivating material were used as substrates. Prior to performing any processing, the substrates were cleaned in a solution of ammonium fluoride and hydrofluoric acid 6:1 for 60 s to remove any native oxide from the wafer surface. Immediately following this cleaning the wafers were spin coated with a bilayer of polymethyl methacrylate 共PMMA兲 共MicroChem, Nano PMMA兲. The bilayer consisted of two different molecular weight 共MW兲 PMMA formulations to produce an undercut in the developed resist sidewall profile to facilitate liftoff pattern transfer. The lower layer was a 4% 495 K MW PMMA in anisole spun onto each wafer at 4000 rpm for 1 min to produce a 1000 Å thick layer. Following spin coating, each wafer was baked for 15 min on a 170 °C hotplate. After removing the wafers from the hotplate a layer of 2% 950 K MW PMMA in methyl isobutyl ketone 共MIBK兲 was spun onto each wafer at 2000 rpm for 1 min to provide an additional 800 Å thick layer. This coating step was followed by a final bake identical to the one used for the first layer. High-resolution direct write EBL was used to define the first layer of features consisting of the VACNF catalyst sites, global, and die-level registration marks for subsequent photolithography steps, critical alignment measurement marks, and location marks for FE testing. A Leica VB6-HR with a 100 keV thermal FE source was used to perform the EBL exposures. A beam current of 1 nA and a pixel size of 5 nm were used to pattern all of the features on this layer. An electron area dose of 10 000 C/cm2 was used to expose the VACNF catalyst sites. The sites were patterned as 50 nm squares on a 50 m pitch in a 5⫻5 array and were intentionJ. Vac. Sci. Technol. B, Vol. 19, No. 2, MarÕApr 2001
FIG. 1. Process flow for the gated cathode structure fabrication: 共a兲 4 in. n-type Si wafers were used as substrates; 共b兲 direct write electron beam lithography was used to expose the first layer of features consisting of the VACNF catalyst sites and alignment marks for subsequent patterning steps. This exposure was metallized by a liftoff of a 200 Å Ti and 200 Å Ni bilayer 共Ni on top兲. 共c兲 A 1-m-thick layer of PECVD SiO2 was deposited onto the substrates. 共d兲 Photolithography was used to expose a brightfield image of the gate electrode and contact pad. 共e兲 This exposure created a negative latent image of the gate electrode and contact pad in the photoresist layer. 共f兲 An ammonia-based image reversal process was performed to change the tone of the latent image and, consequently, introduce a reentrant profile into the developed resist sidewalls to facilitate liftoff. 共g兲 1000 Å of Cr was deposited onto the substrates and then liftoff was performed 共h兲. 共i兲 A CHF3 /O2 , 30 sccm/2 sccm RIE etch was performed to release the buried catalyst layer. 共j兲 In situ PECVD growth of the VACNF is performed to complete the gated cathode structure.
ally overexposed to produce 100 nm circular dots. All other features on this layer were exposed with a dose of 800 C/cm2. A 7⫻7 array of die was patterned onto each wafer with 10 mm spacing between die in both the X and Y directions. The electron beam exposures were developed in a solution of MIBK:isopropanol 1:3 for 1 min with no agitation. Prior to metallization each wafer was subjected to a RIE 共Plasma-Therm, PT72兲 in an O2 plasma for 6 s to remove any undeveloped resist from the patterned areas. A plasma power density of 0.25 W/cm2 with a chamber pressure of 30 mTorr and an O2 flow of 30 sccm was used during this etch. Using an electron gun PVD system the wafers were metallized with 200 Å of Ti and 200 Å of Ni. An evaporation
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rate of 6 Å/s and a base chamber pressure of 1⫻10⫺6 Torr were used for both depositions. Following removal from the PVD system the wafers were allowed to soak in a solution of acetone and methylene chloride 1:1 for 2 h, dissolving the unexposed resist, and lifting off the metal from the unexposed areas. 30 s of ultrasonic agitation was applied to the wafers at the end of this process while still in solution. The wafers were removed from the solution and rinsed thoroughly with acetone and isopropanol to ensure that all metallic debris was washed away. Following the liftoff process the wafers were inspected with a scanning electron microscope 共SEM兲 共LEO 982兲. After calibrating the SEM to a 300 nm periodic grating, critical dimension measurement of the catalyst sites was performed. Approximately 1 m of silicon dioxide was deposited onto each wafer using a 275 °C silane-based PECVD process. Following this deposition, each wafer was spin coated with approximately 700 nm of photoresist 共Olin OiR 620兲 at 3000 rpm for 30 s following a liquid prime using a commercial solution 共P-20, MicroSi兲 of 20% hexamethyldisilazane in propylene glycol monomethyl ether acetate and baked on a 90 °C hotplate for 1 min. Following a characterization of the thickness uniformity of the resist across each wafer using ellipsometry 共Rudolph, FTM兲, photolithography was performed using a GCA Autostep 200 i-line stepper with an automated dark field alignment system 共DFAS兲. After mapping the scaling, orthogonality, and rotational offsets across the wafer by examining the DFAS alignment mark on each die, the wafers were exposed with the gate electrode pattern using a brightfield mask 共i.e., the pattern features that will ultimately be transferred to the substrate are left unexposed兲. This pattern consisted of an electrical probing pad connected to a 300 m square electrode with a 5⫻5 array of 1 m circular apertures aligned to the catalyst sites buried beneath the layer of oxide. Exposed wafers were placed in a Yield Engineering Systems LP-III ammonia diffusion oven for image reversal.14 To complete this process, a flood exposure of ultraviolet 共UV兲 light was performed for 60 s using a Hybrid Technologies Group IIIHR contact aligner to expose the previously unexposed areas of the pattern, i.e., the gate electrode and contact pad. This technique created a reentrant resist sidewall profile with a significant amount of undercut to facilitate liftoff pattern transfer. The wafers were developed in Shipley MF 321 developer 共aqueous tetramethyl ammonium hydroxide, 0.21 N兲 for 1 min and rinsed in de-ionized water. Following the development, each wafer was subjected to an O2 reactive ion etch for 20 s using the parameters described above to remove any undeveloped resist from the patterned areas. The wafers were placed in a PVD system and 100 nm of electron gun evaporated Cr was deposited, metallizing the gate electrode and probing pad. An evaporation rate of 10 Å/s and a base chamber pressure of 1 ⫻10⫺6 Torr were used for this deposition. Liftoff was performed as described previously using Shipley 1165 resist stripper in place of the acetone:methelyne chloride solution. Wafers were allowed to soak in this solution overnight to JVST B - Microelectronics and Nanometer Structures
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ensure a clean liftoff. 30 s of ultrasonic agitation was used at the end of this process followed by the removal of the wafers from the stripping solution. The wafers were rinsed thoroughly with acetone and isopropanol to remove any residual metallic debris from the surface of the wafers. Using the Cr as an etch mask the wafers were placed in a RIE chamber 共Plasma-Therm, PT72兲 and a CHF3 /O2 , 30 sccm/2 sccm etch was performed using a plasma power density of 0.30 W/cm2 and a chamber pressure of 60 mTorr. These parameters achieve an etch rate of roughly 32 nm/min on the PECVD oxide used in this process. The etching procedure was performed for 40 min to ensure that the oxide was completely removed from the catalyst sites on the substrate surface. The geometry of the gated cathode structure inhibits the etch rate slightly and makes overetching necessary to release the catalyst completely. B. In situ growth of the carbon nanofiber emitter
dc PECVD growth of VACNFs was performed in a glass vacuum chamber evacuated by a mechanical pump to a base pressure less than 5 mTorr. Growth was performed on 1 cm square samples containing a single 5⫻5 array structure positioned in the center of the die. Prior to VACNF growth the substrates were etched in an ammonia/helium plasma and then annealed at 700–750 °C, the temperature at which VACNFs are typically grown. Previous work10 has shown that an initially continuous Ni thin film, nominally 20 nm thick, breaks into submicron droplets during this annealing phase. For circularly patterned catalyst sites the diameter of the patterned area and the thickness of the Ni determine whether multiple or single droplets form during the annealing. By restricting the diameter to 100 nm, a single Ni droplet forms.10 This droplet is the necessary precursor for the catalytic growth of single VACNFs at the lithographically predetermined locations. A mixture of carbonaceous and etchant source gases was used for the VACNF growth. In the present work, 14 sccm of acetylene and 200 sccm of an ammonia 共10%兲–helium 共90%兲 mixture were used. The etchant is needed to remove the graphitic C film that continuously forms during the growth from the plasma discharge, passivating the catalyst and thereby preventing the formation of VACNFs. To initiate the VACNF growth process the ammonia–helium mixture is introduced into the chamber first and a dc plasma discharge is created. After the plasma is started, acetylene is introduced and the VACNF growth begins. The dc plasma discharge was operated at 50–200 mA and roughly 480–550 V. The typical growth rate was 100–200 nm/min. Each Ni droplet initiates the formation of an individual VACNF and the Ni droplets ride upward on the tips of the VACNFs, providing continued catalytic growth. The VACNFs are aligned along the direction of the electric field in the plasma discharge and normally grow perpendicular to the substrate. III. RESULTS AND DISCUSSION Several microfabricated gated cathode structures presented in the literature rely on thermally grown SiO2 as an
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FIG. 2. Breakdown measurement of the PECVD SiO2 used in this process using 200 m square capacitors. The data shown here are the averages from four capacitors on different die from the same wafer. This shows that sufficient extracting potential can be placed on the gate electrode without risking breakdown.
interlayer dielectric due to the dielectric strength and thickness uniformity of thermally grown SiO2 films. The PECVD SiO2 films used as the interlayer dielectric in the process presented in this work were electrically characterized by performing current–voltage (I – V) measurements on 200 m square capacitors using a Keithley 237 source measurement unit. The average data from four capacitors on four different die from the same wafer run is shown in Fig. 2. These capacitors were found to have average breakdown fields in excess of 150 V/m, surpassing the dielectric strength required for most microfabricated gated cathode devices. An ellipsometer 共Rudolph, Auto El IV兲 was used to characterize the film thickness across each wafer and found to vary by less than 5%. An example of a completed structure from the first wafer fabricated in this process is shown in Fig. 3. In this particular sample the misalignment between the gate electrode aperture
FIG. 3. Example of an oblique angle SEM image of a gated cathode structure with an in situ grown VACNF. J. Vac. Sci. Technol. B, Vol. 19, No. 2, MarÕApr 2001
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FIG. 4. Example of a SEM image of the alignment between the catalyst site and the gate electrode aperture on wafers exposed with a 200 nm static X offset during the gate electrode exposure. The misalignment was measured as the offset between the ideal center of the gate aperture and the catalyst site.
and the growth site of the VACNF was approximately ⫺250 nm in X and negligibly small in Y.15 After inspection of structures from a variety of locations on the wafer this misalignment was found to be systematic within 30 nm. Subsequent wafers were processed using a 200 nm offset in X during the exposure of the gate electrode. This greatly reduced the misalignment to below 50 nm across an entire wafer on three subsequent wafers fabricated using this process. An example of this alignment is shown in Fig. 4. The 1000 Å thick Cr layer functioned as an effective etch mask and gate electrode. The Cr was slowly sputtered off of the gate electrode during the oxide etch at a rate slightly more than 1 nm/min, leaving approximately 500 Å of Cr on the finished structure. However, use of Cr raised two processing issues. First, Cr forms a stable native oxide under ambient room conditions, which can inhibit the ability to make ohmic contact to the gate electrode. This was observed while using a manual probing system to examine the electrical qualities of the Cr film. However, when two Al wedge bonded contacts were made onto the same Cr pad ohmic conduction was observed during I – V analysis, giving a leadto-lead resistance of around 20 ⍀. The second processing issue presented by the use of Cr was a corrosive reaction with the ammonia used in the VACNF growth. Excessive amounts of ammonia were found to badly corrode the Cr electrode while still producing reasonable looking VACNFs 共refer to Fig. 5兲. It should be noted that the integrity of the VACNF structure is also somewhat degraded by excess ammonia, although this has not been quantitatively studied at present. By finding the right balance of ammonia, this problem was avoided yielding the device shown in Fig. 3. The use of other metals that are equally resistant to halocarbon-based SiO2 RIE processes is currently being investigated. During the VACNF growth process, a thin layer of turbostratic carbon was found to deposit onto areas of the substrate. This raised concerns that the gate electrode was being
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FIG. 5. SEM image showing the effect of excess ammonia on the gated cathode structure and the VACNF during VACNF growth.
electrically shorted to the cathode along the step edges of the gating structure. In order to investigate this possibility, energy dispersive x-ray 共EDX兲 spectra were taken for the entire gating structure 关refer to Fig. 6共a兲兴 and for the bottom of the gated cathode well 关refer to Fig. 6共b兲兴. The presence of C was observed while analyzing the entire gated cathode structure. However, no noticeable amounts of C were detected along the bottom of the wells, presumably indicating that the gate and cathode are still electrically isolated. Consequently, the use of the dilute ammonia etchant gas during VACNF growth seems to be effective in removing any amorphous carbon layer within the wells, as intended. Electrical characterization of the completed structures is currently underway and will be discussed in a future publication.16 IV. CONCLUSION We have demonstrated the fabrication of gated cathode structures using a single in situ grown VACNF as a FE element. This process takes full advantage of the directed selfassembly of VACNFs made possible by lithographically defining the catalytic growth sites. Our growth process of VACNFs in well structures with 1:1 aspect ratio provides compelling evidence that VACNFs can enable the development of practical micro- and nanoscale FE arrays with wideranging applications One disadvantage of this process is the mix-and-match nature of the hybrid lithography process used to define the gated cathode structures. The feature size required for the catalyst sites is below the range easily attainable with the photolithography equipment available to the research community. The incorporation of the electron beam lithography patterning step overcomes this resolution barrier at the cost of additional process complexity and diminished throughput. Using this type of hybrid lithography also introduces concerns with pattern overlay between the EBL and photolithography tools. However, the alignment seen between the two tools used in this work is sufficient for our application and it may be possible to further characterize the misalignment between the two tools and reduce it even further. Adopting a die-by-die alignment strategy in place of the global mapping approach currently used may also achieve tighter alignment tolerances, again at the cost of throughput. JVST B - Microelectronics and Nanometer Structures
FIG. 6. Sample of EDX spectra taken from a completed gated cathode structure: 共a兲 data taken from an entire structure; 共b兲 data taken from the bottom of the gated cathode well. The carbon present in 共a兲 is either from the VACNF or an area of turbostratic C on top of the gate electrode while the data shown in 共b兲 indicate that this layer of carbon is not present on the bottom of the well, presumably leaving the gate and cathode electrically isolated.
The dc PECVD process used in this work is currently limited in terms of substrate size. The growth chamber cannot currently accommodate pieces larger than 4 cm in diameter, with the heater acting as the size-limiting element. By increasing the physical size of the chamber, enlarging the heater platen, and adjusting the flow of gas in the chamber to permit uniform flow over a larger volume, it should be possible to achieve growth on much larger substrates. This would enable wafer-scale production of these devices, thereby making it a viable manufacturing technology for a variety of applications that require microfabricated FE devices. ACKNOWLEDGMENTS The authors wish to thank C. E. Thomas for helping to establish this research program, G. Eres, Y. Wei, E. D. Ellis, C. Britton, D. Hutchinson, J. Wilgen, and J. Whealton for
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their involvement in this project, and P. H. Fleming for her assistance with sample preparation. This work was performed in part at the Cornell Nanofabrication Facility 共a member of the National Nanofabrication Users Network兲 which is supported by the National Science Foundation under Grant No. ECS-9731293, its users, Cornell University and industrial affiliates. The authors wish to thank the entire staff of CNF for their support. This work was funded by DARPA under Contract No. 1868HH26X1 and by the Laboratory Directed Research and Development Program of Oak Ridge National Laboratory 共ORNL兲. ORNL is managed by UT-Battelle, LLC, for the U.S. Department of Energy under Contract No DE-AC05-00OR22725. 1
For a comprehensive review of this technology refer to D. Temple, Mater. Sci. Eng., R. 24, 185 共1999兲. 2 T. E. Felter, J. Vac. Sci. Technol. B 17, 1993 共1999兲. 3 R. Baptist, C. Beith, and C. Py, J. Vac. Sci. Technol. B 14, 2119 共1996兲. 4 P. Vaudaine and R. Meyer, International Electron Devices Meeting 1991, Technical Digest, 8–11 December 1991, Washington, DC 共IEEE, New York, 1991兲, pp. 197–200. 5 P. M. Phillips, R. E. Neidert, L. Malsawma, and C. Hor, IEEE Trans. Electron Devices 42, 1674 共1995兲. 6 A. A. G. Driskill-Smith, D. G. Hasko, and H. Ahmed, Appl. Phys. Lett. 75, 2845 共1999兲. 7 V. I. Merkulov, D. H. Lowndes, L. R. Baylor, and A. A. Puretzky, Inter-
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578 national Vacuum Microelectronics Conference 共IEEE, New York, 1998兲, Vol. 11, pp. 178–179. 8 V. I. Merkulov, D. H. Lowndes, G. E. Jellison, Jr., A. A. Puretzky, and D. B. Geohegan, Appl. Phys. Lett. 73, 2591 共1998兲. 9 V. I. Merkulov, D. H. Lowndes, and L. R. Baylor, Appl. Phys. Lett. 75, 1228 共1999兲. 10 V. I. Merkulov, D. H. Lowndes, Y. Y. Wei, G. Eres, and E. Voekl, Appl. Phys. Lett. 76, 3555 共2000兲. 11 V. I. Merkulov, D. H. Lowndes, and L. R. Baylor, J. Appl. Phys. 89, 1933 共2001兲. 12 Z. F. Ren, Z. P. Huang, J. W. Xu, J. H. Wang, P. Bush, M. P. Siegal, and P. N. Provencio, Science 282, 1105 共1998兲. 13 Z. F. Ren et al., Appl. Phys. Lett. 75, 1086 共1999兲. 14 The ammonia–vapor-based image reversal process causes base-catalyzed decarboxylation of the indene carboxylic acid in the irradiated areas of the pattern, making these areas insoluble in developer. The subsequent UV flood exposure converts previously unexposed areas to indene carboxylic acid, which are soluble in developer. For more information on this process refer to H. Moritz, IEEE Trans. Electron Devices ED-32, 672 共1985兲. 15 Alignment was measured by first identifying the perimeter of the gate aperture in an SEM 共LEO, 982兲, finding the center of that circle, and then measuring the offset between that point and the center of the Ni catalyst site on the substrate surface. 16 L. R. Baylor, E. D. Ellis, V. I. Merkulov, M. A. Guillorn, M. L. Simpson, and D. H. Lowndes, to be presented at the 45th International Conference on Electron, Ion, and Photon Beam Technology and Nanofabrication, Washington, DC, 29 May–1 June 2001.
