Projected Bandwidth Loop – An Alternative to Adaptive Bandwidth Loops with Reduced Complexity Faisal A. Khan*, Andrew G. Dempster, Chris Rizos School of Surveying & Spatial Information Systems University of New South Wales Australia *
[email protected] Abstract — For a carrier phase positioning receiver, phase lock loop (PLL) performance is of critical importance due to the fact that the carrier phase measurements, used for determining the final positioning solution, originate from the PLL. The performance of the PLL dictates the quality of these measurements and eventually, that of the positioning solution. Total phase jitter has been identified as the metric of a PLL’s performance and needs to be reduced to improve the quality of these measurements. Use of an adaptive bandwidth (BLa) architecture is a widely accepted approach to reduce this jitter, but is associated with increased processing complexity. This paper proposes the novel concept of the Projected Bandwidth (BLp) architecture which offers similar advantages but with reduced complexity. However, this is achieved at the cost of slight degradations in jitter reductions compared to a BLa architecture. It is shown using theoretical analysis that the use of a BLp architecture does not degrade the improvements by more than 3.7% of those offered by a BLa architecture. It is also shown that for Carrier-to-Noise- and Interference-Ratio (CNIR) more than 40dB-Hz, the BLp architecture offers the same amount of jitter reduction as a BLa architecture. This paper also discusses implementation issues and presents simulation results. It is shown that by using BLp, total phase jitter reduction of more than 25% can be achieved. Keywords-Projected Bandwidth, Adaptive Bandwidth, Tracking Loops, PLL, interference mitigation
I.
INTRODUCTION
Operation of global navigation satellite system (GNSS) receivers in noise- and interference-dominated environments results in degraded positioning solution accuracy and precision. The quality of this positioning solution typically depends on the quality of carrier-phase measurements (CPM) and pseudorange measurements (depending upon the type of solution) which originate from the tracking loops. The performance of these tracking loops dictates the noise induced in these measurements, and eventually the quality of the positioning solution. The performance of a tracking loop can be evaluated in terms of its total phase jitter. Improvement of pseudorange/carrier-phase measurement quality, and eventually the quality of the positioning solution, requires minimisation of this phase jitter. Various techniques have been employed for reducing this jitter, including Doppler aiding
from INS or from other tracking loops, adaptive selection of tracking loop bandwidth, etc. Of these approaches, the adaptive bandwidth (BLa) tracking loop architecture is an attractive option as it offers improvements in terms of jitter minimisation without requiring any assistance from outside the loop. However, an adaptive selection of tracking loop bandwidth is achieved at the cost of platform dynamics and carrier-to-noise and interference ratio (CNIR) estimation. These estimation processes contribute to the signal processing complexity. This paper introduces the concept of a projected bandwidth (BLp) tracking loop architecture for measurement noise reduction. This architecture is proposed as a replacement to the adaptive bandwidth loop architecture with the goal of removing the burden of dynamics estimation, and hence reducing the scheme’s complexity. This architecture offers similar measurement quality improvements to the adaptive bandwidth (BLa) tracking loop architecture with some trade-offs. The phase lock loop (PLL) in the receiver is required to generate estimates of the incoming signal by simultaneously mitigating the oscillator-induced and the dynamics stress error, and the noise- and interference-induced error. The mitigation of the former error requires widening of the tracking loop bandwidth (BL) while the latter requires the narrowing of BL. In a typical receiver operation, a BL value is selected that can handle the maximum expected dynamics. This results in poor PLL operation during low dynamics and high noise and interference conditions. This problem is solved by keeping track of dynamics and received noise and interference and adaptively adjusting the BL. It is shown that by using BLp, the burden of estimating dynamics can be removed, but at the expense of a slight degradation in solution quality compared to the use of BLa. This paper first quantifies the theoretical noise reduction achieved in individual CPM by employing BLa. The concept of BLp is then discussed and the associated improvements are compared with those achieved using BLa relative to a fixed bandwidth (BLf) tracking loop. Also, the degradation in CPM quality improvement by using BLp as compared to BLa is quantified. This paper considers the Locata positioning network for the scheme’s implementation. Locata is a terrestrial positioning system that operates on the same basic principles as GPS A
Locata Network (LocataNet) is comprised of timesynchronised terrestrial transceivers (called LocataLites), operating in the 2.4GHz ISM band and transmitting signals appropriate for positioning. Nevertheless, the proposed scheme is equally applicable to GNSS. The paper is organised as follows: After introducing the concept in Section 1, Section 2 presents an analysis of the PLL’s total phase jitter. This is followed in Section 3 by a discussion on the requirement of an adaptive bandwidth loop architecture and the complexity involved. Section 4 describes the proposed scheme and discusses the implementation issues. Section 5 discusses the simulation results that demonstrate the quality improvements, and compares the results of the proposed architecture against that of the adaptive bandwidth loop. Section 6 concludes the paper. II.
CARRIER PHASE JITTER ANALYSIS
A PLL’s total phase jitter has been identified as a metric of PLL’s performance [1]. This total phase jitter is composed of four significant components: the noise- and interferenceinduced jitter phase jitter σ ϕ , the vibration-induced jitter σ ϕ , v
t
the oscillator noise-induced jitter σ ϕ and the dynamic stress osc
error θ d , which can be combined as follows [2]:
σ ϕ = σ ϕ2t + σ ϕ2v + σ ϕ2osc −Tx + σ ϕ2osc − Rx +
θd 3
(1)
σ δϕv = 2πf o2
∫
∞
k g2 ( ω )G g ( ω )ω 4
t
The noise- and interference-induced jitter σ ϕ reflects the
C. Oscillator Noise-Induced Jitter σ ϕosc In contrast to σ δϕ , which reflects external phase noise, v
σ ϕosc −tx and σ ϕosc− rx reflect the oscillators’ natural phase noises at the transmitter and the receiver ends respectively. Such phase noises, resulting from oscillator instabilities, can be written as [2]:
σ ϕosc = 2πf o2
∞ ⎡ 2π 2 h −2 ⎢ 4 0
∫
⎢⎣ ω
BL
h0 ⎤ ω 6 πh−1 dω + ⎥ ω 3 2ω 2 ⎥⎦ ω L6 + ω 6
(4)
For a 3rd order loop, dynamics stress error can be given by [2]:
d 3R
θd =
dt 3
ω L2
(5)
3 where d R
(2)
denotes the CNIR and T denotes the
( No + I ) integration duration. Equation (2) suggests that for a given CNIR BL needs to be minimised in order to reduce the effect of noise on σ ϕ . However, reduction in BL demands a t
consideration of the other major contributors to the total phase jitter.
B. Vibration-Induced Jitter σ ϕ
+
where, h-2, h-1 and h0 are the oscillator coefficients, which must be derived experimentally. For a Locata rover receiver, the TCXO-related characteristics can be made known a priori so this component of jitter can be determined prior to operation.
t
where C
(3)
where fo is the carrier frequency, kg is the oscillator’s gsensitivity in parts-per-g, Gg is the single-sided vibration spectral density, ω is the vibration radian frequency and ωL=1.885BL. A 3rd order loop is considered here as that is what is used in current Locata rover receivers.
effects of received noise and interference on PLL operation, and can be represented as [2]:
σ ϕt =
dω
D. Dynamics Stress error θ d
A. Noise- and Interference-Induced Jitter σ ϕ
⎞ ⎛ ⎟ ⎜ 1 ⎟ ⎜1 + C C 2T ( N o + I ) ⎜⎝ ( N o + I ) ⎟⎠
ω L6 + ω 6
0
v
Vibration-induced phase jitter σ δϕ is the external phase v
noise caused when the platform, on which the receiver is mounted, is subjected to mechanical vibration. For a third order PLL, this can be given as [2]:
denotes the maximum 3rd order line-of-sight dt 3 dynamics experienced by the receiver. Trends of these individual sources of error against different values of PLL bandwidth are depicted in Figure 1. Data for a generic TCXO and platform vibration, extracted from [1] and [3] respectively have been used to plot the phase error/jitter profiles in Figure 1. Plots assume a CNIR value of 40dB-Hz. Also 0.38g/s is assumed for dynamic stress errors as suggested by [4] as an operational standard value for an automobile LOS 3rd order dynamics. Figure 2 depicts the total phase jitter plotted against CNIR and BL. The heavy line at 15o in this figure denotes the theoretical upper limit of total phase jitter, which has been defined for an acceptable operation of a PLL [1]. The above discussion supports the contention that received noise and interference are not the only factors contributing towards the carrier phase jitter. Also, reduction of BL for noiseand interference-induced jitter reduction, as suggested by Equation (2), will increase jitter induced by the other three components. These components set a lower limit on the extent to which this bandwidth BL can be decreased. A trade-off needs
50 40
minimises the total phase jitter. This minimum achievable jitter (MAJ) point is jointly set by the received signal’s CNIR, dynamic stress, oscillator dynamics and platform vibration. This figure suggests that both the received signal CNIR and the tracking loop BL have to be considered in order to operate the receiver at the MAJ point. This is achieved by estimating the received signal’s CNIR and dynamics and setting the bandwidth adaptively to produce the MAJ. Use of adaptive bandwidth (BLa) tracking loops to reduce tracking loop measurement noise has been explored previously and various algorithms have been proposed in earlier papers [5], [6], [7]. This paper considers the use of the adaptive bandwidth algorithm as implemented in [5]. In order to estimate the platform dynamics, phase measurements at the output of the discriminator are used considering the following relationships:
Dynamic Stress TCXO Noise+Interference Vibration
30
Phase error (deg)
20 15 10
θd =
1 1
10
Loop Bandwidth (Hz)
20
30
50 40 30
Total Phase Jitter (deg)
dt 3
(6)
ω L3 2
dt 3
= λK
∑ b B θ ( ∞ )T i
L e
(7)
i =0
Here λ denotes the carrier wavelength, K and bi denote the loop co-efficients, and θ e ( ∞ ) denotes the phase discriminator measurements. For Estimating CNIR, the narrow-to-wideband power ratio method [8] is used.
Figure 1 - Individual Sources of Phase Jitter/Error
Improvement achieved by using adaptive bandwidth (BLa) instead of a fixed bandwidth (BLf) is quantified here in terms of total phase jitter reduction. An improvement margin factor M can be defined as:
20 15
⎛ σ ϕ [ Adaptive BL ] M = ⎜1 − ⎜ σ ϕ [ Fixed BL ] ⎝
10
1 1
d 3R
d 3R
32 dB-Hz 35 dB-Hz 40 dB-Hz 45 dB-Hz 50 dB-Hz 10
Loop Bandwidth (Hz)
20
30
Figure 2 - Theoretical total phase jitter against loop bandwidth for different CNIR
to be made when selecting an appropriate bandwidth that can help in rejecting received noise and interference, and at the same time is able to handle the dynamics and keep the jitters due to other factors at reduced values. III.
ADAPTIVE LOOP BANDWIDTH
It can be observed from Figure 2 that for each value of CNIR, there exists a tracking loop bandwidth (BL) which
⎞ ⎟ × 100 ⎟ ⎠
(8)
This improvement margin is plotted in Figure 3 against the tracked signal’s CNIR and the PLL’s BLf. The same values were used for determining individual jitter components as in Figure 1. Here it can be noticed that this improvement margin (M) varies potentially against both of these two factors. It should be noticed that by using BLa instead of BLf, significant jitter reductions can be achieved at both higher and lower CNIR values. In particular at lower CNIR values, where the measurements are potentially corrupted by the received noise and interference, this reduction in total phase jitter offers cleaner measurements. IV.
PROJECTED LOOP BANDWIDTH
The above discussion shows that an adaptive bandwidth loop architecture offers improvements in terms of phase jitter reduction at the cost of CNIR and dynamics estimation that increases the scheme’s complexity. The concept of a projected bandwidth (BLp) loop architecture is introduced here to replace the adaptive bandwidth loop architecture with the goal of reducing the scheme’s complexity. Use of BLp offers similar jitter reductions as BLa by operating the PLL either at the MAJ point or in its close vicinity depending on the received signal’s CNIR. This is achieved in two steps: first a lookup table (LUT)
50
jmax = 1g/s
40
jmax(ref) = 0.25g/s jmax = 0.1g/s
30 60
Total Jitter (deg)
Jitter Reduction (%)
80
40
20
0 50
20
σφ
(min)
for jmax = 1g/s
15 Degradation in Noise Reduction
BL = BL (p)
10 45 40
CNIR (dB-Hz)
35 30
30
25
20
15
10
5
1 σφ
BLf (Hz)
for jmax (ref) 10
20
Loop Bandwidth (Hz)
Figure 3 - Phase jitter reduction (M) achieved by using adaptive bandwidth loop architecture as compared to fixed bandwidth loop architecture.
30
Figure 4 - Concept of projected loop bandwidth (BLp) illustrated.
30
25
Jitter Reduction (%)
of total phase jitter values is generated for a reference value of line-of-sight (LOS) jerk dynamic stress (ref-jmax) spanning the desired range of CNIR and BL values. This LUT contains a BLp value for each CNIR that produces MAJ for a signal experiencing ref-jmax dynamics. Then during the course of normal receiver operation, an estimate of the received signal’s CNIR is generated and the generated LUT is used to determine the BLp for the estimated CNIR. This is in contrast to the adaptive bandwidth loop architecture where a signal’s dynamics/velocity also needs to be estimated before an optimal BL can be chosen. BLp obtained from the LUT is then used to track the signal until the received signal’s CNIR remains constant. In this way, the operation at BLp allows tracking with reduced jitter, as compared to a fixed bandwidth loop, by only estimating CNIR and removing the burden of dynamics estimation at the cost of some reduction in solution quality improvements.
(min)
20
15
10
5
0
The following example can be used to illustrate the concept. Consider an application where the range of jmax is expected to be 0.1g/s – 1g/s. Figure 4 shows the total phase jitter plotted against BL for the extreme values of expected jmax (0.1g/s and 1g/s). This plot assumes the received signal’s CNIR to be 35dB-Hz and oscillator- and vibration-induced jitters to be the same as used for plotting in Figure 1. Also plotted in this figure is the total phase jitter curve for jmax=0.25g which serves as a reference. It can be noticed that the MAJ point for this reference curve occurs at BL=17Hz. This value of 17Hz is recorded as BLp in the LUT against a CNIR of 35dB-Hz. If this BLp value is projected to operate a receiver experiencing jmax=1g/s for the same CNIR value, a jitter value of 9.8° is obtained, which will be 0.2° higher than its MAJ (=9.6° for jmax=1g/s and CNIR=35dB-Hz) – a 2% degradation in noise reduction as compared to MAJ obtained by tracking the signal
-5 32
Adaptive Bandwidth Projected Bandwidth 34
36
38
40
42
CNIR (dB-Hz)
44
46
48
Figure 5 - Phase jitter reduction achieved by using BLa and BLp as compared to BLf.
with jmax=1g/s at BLa. Similarly, for a receiver experiencing jmax=0.1g/s, this degradation turns out to be less than 1%. Figure 5 depicts the reduction in total phase jitter using BLa and BLp as compared to the use of a fixed BL of 15Hz. It can be seen that the BLp curves coincide with BLa curves for CNIR>40dBHz. This is due to the fact that for CNIR>40dB-Hz, minimum jitter is experienced at the same BL for all jmax values. Figure 6 shows the expected degradations in noise reductions that are experienced using BLp instead of BLa, for jmax=0.1g/s through
30
3.5
25
3
Jitter Reduction (%)
Degradation in Jitter Reductions (%)
4
2.5 2 1.5 1
34
36
38
40
42
44
46
CNIR (dB-Hz)
48
50
Figure 6 - Amount of degradation in jitter reduction due to use of BLp instead of BLa as compared to BLf, for jmax = 0.1g/s through jmax = 1g/s.
jmax=1g/s over a range of CNIR values, when a reference curve of jmax=0.25g/s is used. The jmax for the reference curve is chosen as the one that maximises the ratio
σ ϕ adaptive
σ ϕ projected for
all expected values of CNIR and jmax. It can be seen from Figure 6 that the maximum degradation experienced will be 3.7%. Again, this figure suggests that for CNIR>40dB-Hz no degradation in noise reduction is experienced.
A. Lookup Table Implementation The scheme proposed above assumes the implementation of a LUT. This LUT is established only for the reference jmax, over the expected range of CNIR values. The range of CNIR and BL values is used for which the total phase jitter does not cross the 15o threshold. σ ϕosc needed to generate this LUT is determined using: ∞
∫
2
σ ϕosc = Sφ ( ω ) 1 − H ( ω ) dω
(9)
0
where 2
1− H(ω ) =
ω6 ω L6 + ω 6
(10)
for a 3rd order loop and Sφ ( ω ) is the oscillator phase noise power spectral density (PSD) due to frequency instability, which is known a priori for a Locata rover receiver. Similarly, σ ϕ is determined using: v
20
15
10
5
0
0.5 0 32
Generic Vibration PSD Experienced Vibration PSD
-5 32
34
36
38
40
42
CNIR (dB-Hz)
44
46
48
Figure 7 – Jitter Reductions achieved using generic vibration PSD compared against varying vibration PSD experienced during real-time operation. ∞
∫
2
σ ϕvib = Gφ ( ω ) 1 − H ( ω ) dω
(11)
0
where Gφ ( ω ) is the vibration-induced oscillator phase noise PSD and a generic PSD depending on the type of application can be used. In a real-world scenario, the experienced vibration PSD may vary from the one used to generate the LUT, introducing slight variations in the jitter, given that the application type remains same. However, the use of a generic PSD still serves the purpose as the LUT is used only to obtain the BLp and not the actual jitter value itself. To demonstrate that similar performance improvements can still be achieved using a generic vibration PSD, improvements in terms of jitter reductions are plotted in Figure 7 using vibration PSD values varying within ±50% of the generic PSD used for generating the LUT. The black line in this figure depicts the expected improvements when the vibration PSD experienced during the real-time operation is the same as the generic PSD used for generating LUT. The green lines depict the effect on performance improvements when the experienced PSD values vary from the generic PSD. It can be seen that the jitter reductions achieved for varying PSD values remain similar to those achieved using generic PSD. Considering the above discussion, it can be concluded that the during real-time receiver operation, the dynamics induced phase error remains the factor that makes the experienced jitter differ from the jitter values in the LUT. This difference in values is the main reason that minimum jitter is experienced at different BL for different values of experienced dynamics, resulting in degradation in jitter reduction experienced using BLp instead of BLa.
V.
VI.
IMPLEMENTATION RESULTS
To evaluate the performance of the proposed scheme, Locata signals were simulated according to available specifications [9]. A software receiver was used to implement the proposed scheme. A road vehicle scenario was considered where the expected range of dynamics was assumed to be 0.1 – 1 g/s. This range of dynamics was chosen as it covers the operational standard value of 0.38g/s for an automobile. CNIR values were kept between 32 – 48dB-Hz. This was done as any CNIR values below 23dB-Hz may produce phase jitter values larger than the 15o threshold. ref-jmax was assumed to be 0.25g/s according to the criteria defined above. Figure 8 shows the implementation results plotted in terms of phase reductions achieved as compared to use of a fix bandwidth of 15Hz. Theoretical graphs are also plotted on the same figure for comparison. It can be seen that the trend of the simulation results follows those of the theoretical results. It can be noted from the simulation results that the project bandwidth (BLp) architecture reduces jitter by a similar amount to that of the adaptive bandwidth (BLa) architecture. It can also be seen that, beyond 40dB-Hz, the BLp architecture reduces the jitter by the same amount as the BLa architecture. This confirms the theoretical results. For CNIR>40dB-Hz, the received noise and interference contribute relatively less jitter to the total phase jitter. This allows the loop bandwidth to be widened to reduce the effects of the other jitter contributors. With these effects reduced, the total phase jitter curve is mainly dominated by the noise- and interference-induced jitter. This makes the loop to produce minimum jitter at same bandwidth even for different platform dynamics, making BLp equal to BLa, as both differed mainly due to the effects of dynamics. This allows the BLp architecture to offer the same jitter reductions as the BLa architecture. 30
Jitter Reduction (%)
25
A tracking loop’s performance becomes vulnerable in a noise- and interference-dominated environment. Total phase jitter, identified as the metric of tracking loop performance, needs to be reduced to achieve any improvements. This paper acknowledges the fact that the widely accepted adaptive bandwidth (BLa) architecture offers improvements. However, this is achieved at the cost of increased receiver operation complexity. Jitter reductions offered by the BLa architecture are quantified in this paper. A novel concept of projected loop bandwidth is proposed that offers similar improvements but with reduced complexity. However, this is achieved at the cost of a slight degradation in jitter reductions using the BLp architecture compared to the BLa architecture. It is found that these degradations do not exceed 3.7%. It is shown that the underlying assumptions regarding vibration PSD do not affect the identified improvements. Simulation results are presented that support the theoretical analysis. It is shown that for CNIR> 40dB-Hz, the BLp architecture offers the same amount of jitter reduction as the BLa architecture. It is also shown that a PLL’s total phase jitter can be reduced by more than 25%. ACKNOWLEDGMENT This research is supported by Australian Research Council Linkage Project (LP0668907 and LP0560910). REFERENCES [1]
[2]
[3]
Adaptive Bandwidth (Theory) Adaptive Bandwidth (Simulation) Projected Bandwidth (Theory) Projected Bandwidth (Simulation)
[4]
20 [5]
15
10 [6]
5 [7]
0
-5
33
35
37
39
41
CNIR (dB-Hz)
43
45
47
Figure 8 – Theoretical jitter reductions compared against jitter reductions achieved using simulations.
CONCLUDING REMARKS
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