Streamlinig Real-Time Controller Design: From ... - Semantic Scholar

Streamlinig Real-Time Controller Design: From Performance Specifications to End-to-End Timing Constraints Minsoo Ryu, Seongsoo Hong

Manas Saksena

School of Electrical Eng. and ERC-ACI Seoul National University Seoul, 151-742, Korea

Dept. of Computer Concordia University Montreal, PQ H3G 1M8, Canada

Abstract This paper presents a control theoretic approach to optimizing end-to-end timing constraints subject to the performance requirements and the schedulability constraint of a real-time control system. The control performance is specified in terms of control output responses such as steady state error, maximum overshoot, settling time, and rise time; and the end-to-end timing constraints include loop processing periods and input-to-output latency. Our approach includes a generic real-time controller model on which our analysis is performed, and a heuristic optimization algorithm which derives end-to-end timing constraints. We apply the approach to the design of an embedded real-time controller, and validate it through an experimental study using simulation. Our approach contributes to both the control and realtime areas: (1) it allows control engineers to take into consideration the effect of scheduling latency and sampling periods at the early stage of system design; and (2) it makes it possible to streamline the design of real-time control systems, since temporal requirements are derived in an automatic manner. Our approach can be effectively used with the period calibration method [2, 8, 4] as its front-end.

1 Introduction With the advent of low cost and high performance microprocessors, digital controllers are being widely employed in many real-time control applications. Examples of such systems include robot arms, autonomously guided vehicles,  The work reported in this paper was supported in part by Engineering Research Center for Advanced Control and Instrumentation (ERC-ACI) under Grant 96K3-0707-02-06-1, KOSEF under Grant 96-2037, S.N.U. Korea Electric Power Corp. Research Fund under Grant 96-15-1135, and NSERC Operating Grant OGP0170345.

and computerized numerical control (CNC) machines, all of which are essential ingredients of modern manufacturing plants. Digital controllers have a noticeable advantage over analog controllers due to their flexible decision making capability. Digital controllers can perform complex control operations in a responsive manner, and can also be made to dynamically adapt to changes in operating environment simply by replacing software modules. Although a digital controller is inherently a real-time system possessing many hard real-time requirements, there has been little collaborative research effort between control and real-time communities. As a result, there exists a big gap between the control system design theory and the real-time scheduling theory. Such a gap makes it difficult for control engineers to benefit from the recent advances of real-time scheduling, and to streamline the development of real-time control systems. In current engineering practice, real-time controllers are designed to optimize some performance measure, neglecting the availability of computing resources on the target platform [2, 9]. When a controller is hosted on a target platform, timing flaws may be detected due to insufficient computing resources. This results in a costly process of fine-tuning the controller’s design. A much better approach is to incorporate the availability of computing resources into the design of the controller by utilizing the results of realtime scheduling theory. Recently, several researchers have investigated interactions between system performance and task scheduling in the context of real-time system design [2, 8, 9]. In [2, 8], we developed a design methodology which allows system designers to consider the schedulability from the early stages of system design. The main contribution of this work was a systematic method to derive task attributes (periods and deadlines) from a system’s end-to-end timing constraints establishing temporal relationships between the system’s external inputs and outputs. Such end-to-end timing constraints include maximum loop processing periods, and max-

imum allowable input-to-output latency. Since the tasks, and therefore their attributes, are artifacts of system design, we proposed that the task attributes can be derived to ensure that the derived task set is schedulable on a target platform, while meeting all the end-to-end constraints. We refer to this method as the period calibration method (PCM) [2, 8, 4]. While the period calibration method brings a much needed integration, it is only half a step, since the endto-end timing constraints are not a genuine starting point in system design, but another set of artifacts which are derived from the system’s performance requirements. This is illustrated in Figure 1, which shows how a design would proceed with the period calibration method. As shown in the figure, there is an ad hoc step of translating the performance specifications for a given system model into a set of timing constraints. In [9], Seto, Lehoczky, Sha, and Shin addressed this problem. They proposed an algorithm that translates a given system performance index into sampling periods considering schedulability among tasks running with preemptive priority scheduling. In their approach they regard sampling periods as variables and attempt to determine their values such that the resultant system obtains the optimal control quality subject to the given schedulability constraint. They perform trade-off analysis between control performance and schedulability by formulating an optimization problem. This is the first approach that we know of, which relates control performance to real-time schedulability and computes sampling periods by way of an algorithm.

Performance Specifications

Application System Model

Ad hoc Translation

System Level Timing Constraints

Period Calibration Method Task Level Timing Constraints fail

Schedulability Check succeed

Figure 1: Ad hoc procedure of real-time system design using PCM. On the other hand, their model has several limitations.

First, they approximated the performance index to be an exponential function. This may lead to a model which cannot accurately describe real systems. Second, their approach does not consider the effect of latency. In a feedback control system, the most important function of the controller is compensating output errors. To do so, the controller reads the state of the plant by sampling data, compares it with the reference input, and then generates a new control command for the plant. Since the plant undergoes changes in its state, while the controller is generating a new control command, the input-to-output latency has a critical effect on control performance [4]. Thus, it is very important to simultaneously consider latency and sampling periods. In fact, there is a tradeoff involved here; a high latency may be compensated by a tight sampling period, or alternatively, a large sampling period may be compensated by a tight latency. In this paper, we built upon our previous work to address some of these problems. In particular, we take the approach presented in [9] of bringing real-time scheduling into the early stage of real-time controller design. More specifically, we present our initial attempt at formalizing the ad hoc step shown in Figure 1 by considering a realistic controller model, and incorporating latency as a variable in addition to sampling periods. Given the analytical model of the system being built, our approach translates the system’s performance requirements into a set of temporal constraints subject to the schedulability constraint. These temporal constraints correspond to the end-to-end timing constraints mentioned earlier, and can be processed further to derive task attributes using the period calibration method. We first develop a generic real-time control system model with rigorous mathematical modeling, and then validate it through an experimental study on a CNC controller. The controller was implemented on top of our own real-time kernel called SNU-ROS (Seoul National University Realtime OS), which afforded tight control over latencies and periods. This CNC controller was earlier used in our previous study [4] to validate the period calibration method. This study highlighted the benefits of PCM, and showed the effects of sampling period, output jitter, and input-to-output latency on control quality. Using this CNC controller, we compare the results of the analytical model with the simulated controller. Our experimental study shows that the real-time controller model is sufficiently accurate to be usable in the design of practical real-time controllers. We believe that our approach, based on digital control theory, contributes to both the control and real-time areas: (1) it allows control engineers to take into consideration the effect of scheduling latency and sampling periods at the early stage of system design; and (2) it makes it possible to streamline the design of real-time control systems, since temporal constraints are derived in an automatic manner.

1.1

Remainder of the Paper Data Sampling

The rest of the paper is organized as follows. In Section 2, we present the main contribution of our approach. We first define the controller model we use in the paper, and characterize control performance. We then develop a generic real-time controller model and present a heuristic optimization algorithm. In Section 3, we demonstrate our approach through the design of an example real-time controller. In Section 4, we validate our model with a simulation study. Finally, we conclude the paper with the discussion of our contributions and future research directions in Section 5.

2 Deriving End-to-End Timing Constraints In this paper we are mainly concerned with the derivation of end-to-end timing constraints from the performance requirements of a real-time control system. In this section, we present the crux of our approach. We first introduce the control system model we use throughout the paper, and characterize what control performance is. Then we develop our mathematical model which relates latency and sampling periods to control performance. Finally, we present a heuristic method to optimize end-to-end timing constraints subject to the given performance specifications and the schedulability constraint.

2.1

Control System Model

A traditional multi-rate control system possesses multiple control loops C1 ; C2; : : :; Cn with different loop processing periods. For the purpose of presentation, we assume that each control loop Ci is implemented with an independent process. This does not impose any serious restrictions, as long as PCM is used to implement the controllers [4]. Note that PCM can handle interactions between tasks in distinct control loops. Control loop Ci consists of mi tasks i1; i2; : : :; imi . For example, Ci may include a sampling task, an input task which generates a reference input, a computation task which executes the control algorithm, and an output task which issues output commands to the controlled system [1]. They form a chain of tasks, as shown in Figure 2. Each control loop Ci has two kinds of timing constraints: (1) maximum loop processing period MaxPi, and (2) maximum input-to-output latency MaxLi . Given a multi-rate control system, our problem is to optimize loop processing period Ti and input-to-output latency Li for all control loops Ci subject to the performance specifications and the schedulability constraint. After these values are determined, we use PCM to derive the periods and deadlines of the individual tasks in the control loops.

Input Generation

Algorithm Computation

Output Transmission

Figure 2: An example control loop.

2.2

Performance Specifications of Control Systems

The first step in the design of a real-time control system is to state its performance specifications. Often, the functional requirements of a given application system translate into the performance specifications. For example, in a vehicle speed control system, the functional requirements would state that the vehicle should be accelerated to a preset speed in 1 sec and to stay within a certain range of the preset speed. It is often necessary to describe system performance in a greater detail depending on which state the system is in. A physical system behaves differently whether it is in a transient state or a steady state. Figure 3 illustrates how the transient and steady states are defined. The straight line (a step function) denotes the controller input (desired response), and the dotted line denotes the output (actual response). In the vehicle speed control system, the input and the output are the desired and actual vehicle speeds, respectively. In an ideal controller, there should be no difference between the input and the output. In reality, however, two factors make a difference: transient state error and steady state error. Transient state error occurs, since a physical system cannot react sufficiently fast to an abrupt and instantaneous change in its input, and only makes gradual state changes. After the transient state, the system approaches a steady state, where it makes close approximations to the desired speed resulting in much smaller error. Steady state error occurs due to various factors such as disturbance, jitter, digitization effects, etc. In control engineering, the transient state response is characterized by maximum overshoot Mpeak , rise time Trise and settling time Tset [5]. The maximum overshoot Mpeak is defined as the maximum peak value of the output response. It is often expressed as a percentage. Rise time Trise is the time required for the output response to reach 100% of its input value from the beginning. Settling time Tset is the time required for the output response to approach and stay within a certain range of the input value (usually 2%). Figure 3 shows these parameters. On the other hand, the steady state response is characterized by steady state error Ess which is defined as the maximum difference between the desired input and the actual output in the steady state. In most real-time controllers, the system performance is specified in terms of the four

Mpeak Input Steady-state error

Trise

Ess

Time

Tset

Transient State

Steady State

termined frequency. Thus, when designing a digital control system, we should consider sampling periods. Since inputs are periodically sampled from a continuous signal, the digital controller must have a fixed period. If the period is infinitely small, the digital controller works as if it were an analog controller. In general, the smaller sampling period leads to the better performance. Figure 5 shows the schematic diagram of the digital control system corresponding to the analog controller shown in Figure 4 [6]. The most noticeable difference between those two schematic diagrams is the existence of ZOH (zero order hold). Whereas the plant needs continuous data, a digital controller periodically produces only discrete data. Thus, the ZOH constantly holds data for the entire sampling period.

Figure 3: Transient state response and steady state response. output response characteristics we defined above.

2.3

r(t)

digitized input

Gc (z)

Gp (z)

ZOH

c(t)

Modeling Discrete-Time Control Systems

After the desired system performance is specified, the next step in the design of a real-time control system is to derive its mathematical model. A mathematical model is defined as a set of equations that collectively describe the dynamics of the system with a known accuracy. Such equations are often differential equations derived using physical laws such as Kirchhoff’s law and Newton’s law. In order to derive closed form solutions of the system dynamics, control engineers usually use the Laplace transform method. It allows us to get more intuitive information than differential equations alone. Figure 4 shows a schematic diagram of a typical feedback control system. In the figure, r(t) and c(t) denote input and output signals, respectively. The “?” sign denotes that the sampled actual output is fed back, and compared to the reference input by subtraction. The controller and the plant are described with two Laplace transforms Gc(s) and Gp (s), respectively.

r(t)

Controller

Plant

Gc (s)

Gp (s)

c(t)

Figure 4: A feedback analog control system. While an analog control system is modeled with differential equations and the Laplace transforms in continuous time domain, a digital control system is modeled with difference equations and the z-transforms in discrete-time domain. The major difference between these two types of controllers is that an analog controller uses continuous time inputs, while a digital controller uses digitized inputs sampled at a prede-

Figure 5: A feedback digital control system. In order to model the effect of latency, we add a delay block to the schematic diagram in Figure 5. Since we are concerned with the propagation delay from the input to the output of the controller, we place the delay block between the controller and the plant, as drawn in Figure 6.

r(t)

digitized input

latency

Gc (z)

L

Delay

Gp (z)

ZOH

c(t)

Figure 6: A feedback digital control system with delay L. Now we analyze the controller model shown in Figure 6 using the z-transform Z (
). We first take the z-transform of the chain of blocks from the input to the output. Then we have the following equation.

Go (z )

=

sT

Gc (z )Zfe?sL
1 ?se gGp (z )

(Eq 1)

sT

Here, T , e?sL and 1?se respectively denote the sampling period, the time delay, and the ZOH. Eq. (1) is called an open loop transfer function, since the feedback is not considered. From Eq. (1), we obtain a closed loop transfer function G(z ) which represents the whole system dynamics including the feedback.

C (z ) = G(z ) G(z ) = R (z ) 1 + G(z )

(Eq 2)

From Eqs. (1) and (2), we can obtain the digitized output of c(t) by taking the inverse z-transform. Using the ztransform method, we can also derive the steady state error Ess, maximum overshoot Mpeak , settling time Tset , and rise time Trise . In general, they are represented as increasing functions of the sampling period T and the latency L, as summarized below.

Ess Mpeak Tset Trise

= = = =

fE (T ; L) fM (T ; L) fs (T ; L) fr (T ; L)

(Eq 3)

Note that we did not develop the above controller model (Eq. (3)) with any specific feedback control system in mind. Thus, if the analytical model of a feedback control system is given – which is derived anyway to build a controller, our framework can help us derive functions like the above.

2.4

A Heuristic Approach

After the performance parameters are represented as functions of period T and latency L, the next step is to optimize these variables subject to the performance specifications and the schedulability constraint. This makes a typical nonlinear optimization problem with a large search space. Solving this problem requires us to find a balance between a sampling period and a latency, since there is a delicate trade-off between them; in some cases, a large period and a small latency make a desirable combination, and in others, a small period and a large latency do. Here, we propose a simple heuristic search algorithm for this problem.

Ess ;Mpeak ;Tset ; Trise Performance Specifications

Mathematical Model

G(z)

fE (T ;L); fM (T ; L) fs (T ;L); fr (T ; L) Initialization:

Ti = Li

Increase Decrease

Tk Lk

System Level Constraints ( for all ) and

Ti

Li

i

Task Level Constraints (Periods and Deadlines)

Scheduling & Implemetation

Figure 7: The iterative design procedure of a real-time control system. Assume that we are given a set of control loops

fC1; C2; : : :; Cng, and the performance specifications on

them. In order to derive loop processing period Ti and latency Li, we use a search algorithm based on iterative improvement. The algorithm is described below. Algorithm 2.1 Derive task attributes. Step 1 Equate loop processing period Ti and latency Li of each controller in the system. Eliminate latency variables in Eq. (3), by substituting them with Ti . Step 2 Compute Ti from Eq. (3). Step 3 Plug back the derived values of Ti into Eq. (3), and then compute the latency values from Eq. (3). Step 4 Derive the periods and deadlines of all the tasks in the system from the derived end-to-end timing constraints using PCM. Step 5 If PCM fails to derive them, increase loop processing period Tk of the bottleneck control loop Ck . Go back to step 3. Step 6 Terminate the algorithm.

In step 5, the bottleneck control loop is defined as the control loop with the largest utilization. The algorithm is also shown pictorially in Figure 7. Since the algorithm makes use of the period calibration method, we briefly review the method. For a more comprehensive discussion, readers are referred to [2, 7]. Overview of the Period Calibration Method. For a given task graph possessing n tasks f1 ; 2 ; : : :; ng and the endto-end timing constraints on inputs and outputs, the period calibration method derives period Ti and deadline Di of task i (1  i  n) in two steps, as below. (Step 1) It derives a set of nonlinear constraints on task attributes Ti and Di such that the derived constraints imply the original system level timing constraints. (Step 2) It solves the derived nonlinear constraints such that chances of obtaining a schedulable task set are maximized. To do so, it uses the following objective functions. min(U

=

Xn ei

i=1 Ti

)

and

8i; 1  i  n; max(Di )

where ei is the execution time of  i . Step 2 involves solving a nonlinear optimization problem which is conjectured to be an NP-hard problem. In order to reduce the amount of computation needed for the optimization problem, we use a polynomial time approximation algorithm developed in [7]. We have shown that the algorithm computes a solution with the minimum utilization in most of the cases.

3 A Case Study: CNC Controller Design In this section we demonstrate how we can derive the loop processing periods and latency of a real-time controller using the mathematical model we developed in the previous section. As in our earlier work [4], we have chosen a CNC controller for this purpose, since it is a multi-rate control system possessing hard real-time properties. The CNC controller we design has two axes (X axis and Y axis) of motion which are controlled by two control loops Cx and Cy , respectively. Each control loop is decomposed into three tasks: sampling task, input generation task, and computation task, as shown in Figure 8. Let xs , xi , and xc (or ys , yi, and yc ) denote these tasks of the X (or Y) axis control loop, respectively.

Sampling Task

Input Generation Task

Solving Eq. (4), we get Tx = Lx = 388s. Similarly, we get Ty = Ly = 280s. Thus, we can obtain end-to-end timing constraints for the CNC controller by simply taking MaxTx = Tx (= 388), MaxLx = Lx (= 388), MaxTy = Ty (= 280), and MaxLy = Ly (= 280). Then, we derive the task periods using the period calibration method. We list the periods and execution times of the tasks in Table 1. The execution times were measured on the 133 MHz Pentium processor. Task

xs xi xc ys yi yc

Computation Task

Period 388s 388s 388s 280s 280s 280s

Execution time 41:50s 84:33s 14:09s 41:50s 84:33s 14:09s

Table 1: The resultant periods and execution times of the CNC controller tasks. Figure 8: The CNC control loop and its constituent tasks. The performance requirements of each control loop are specified as below. In this study we consider only steady state error and maximum overshoot.

Ess  0:01 pulse, Mpeak  9:40% Ess  0:01 pulse, Mpeak  13:89% The unit of steady state error Ess is a pulse which is generX axis Y axis

ated by the encoder (a sampling device) of the motor. Given the above specifications, we derive loop processing periods (Tx , Ty ) and latency (Lx , Ly ) using the algorithm presented in Section 2. The first step in the design is to obtain the analytical models of the two control loops. However, since the discussion of such an analysis is beyond the scope of this paper, we do not explain it in detail. Interested readers are referred to Appendix A. We simply use the results derived there. Using Eqs. (9) through (12) in Appendix A, we derive the loop processing periods and the latency. Note that the steady state error is the constant value of 0 :0091 in our example. Since it satisfies the above requirement (0:01), we consider the maximum overshoot alone. As described in the heuristic algorithm in Section 2, we begin with letting Tx = Lx . We substitute both T and L in Eqs. (10) and (10) with Tx , and then we solve Eqs. (10) through (12) for Mpeak (Tx; Tx). As a result, we obtain the following equation.

Mpeak (Tx; Tx)

= =

100
exp?(= 9:40%

p1? ) 2

(Eq 4)

A simple utilization check verifies that these timing constraints lead to a system which is schedulable via EDF scheduling: the overall utilization U (= 0:86) is smaller than 1.

U

= =

exs exi exc eys eyi eyc Txs + Txi + Txc + Tys + Tyi + Tyc 139:92 139:92 + = 0:86 (Eq 5) 388

280

Note that the tasks have the same period as their maximum loop processing period. This is because we assume that the two control loops are mutually independent. On the other hand, when there exist mutually interacting control loops in a control system, it is not so obvious as above to assign tasks periods and deadlines, and thus it becomes difficult to check the schedulability. In such cases, we can rely on PCM; if PCM fails to produce a result, then we have to derive a different set of end-to-end timing constraints, as explained in the algorithm in Section 2.

4 Experimental Results In order to validate the analytical model of our two-axis CNC controller – and eventually the generic real-time controller model we developed, we have performed a simulation study. We have built a realistic CNC simulator with two Pentium PCs, as in [4]. One PC runs the controller tasks of the X axis control loop on top of SNU-ROS, and the other executes a plant simulator which emulates the CNC motor on MS-DOS. SNU-ROS is a light kernel which allows for fast context switches (5 s on the 133 MHz Pentium processor).

150 analytical results experimental results

absolute percent overshoot (%)

140

130

150 analytical results experimental results 140

absolute percent overshoot (%)

It makes it possible for us to assign very short periods to tasks incurring a small scheduling overhead. In this experiment, we had two variables Tx and Lx . First, we observed how the maximum overshoot changed in both the analytical model and the simulated controller as the test variables varied. Figure 9 shows the transient responses, when the loop processing period is fixed at Tx = 2ms, while the latency varies in [0:2ms; 1:5ms]. Figure 10 shows the transient responses, when the latency is fixed at Lx = 0:5ms, while the loop processing period varies in [1ms; 5ms]. In both graphs, the solid line denotes the analytical model, and the dotted line denotes the simulated controller. These graphs prove that the analytical model is quite accurate: the difference between the two responses is within about 10% of the simulated response, and the two curves are very similar in their shape. This difference is primarily due to the inaccuracy of the simulated plant. The state-updating loop of the plant simulator is invoked every 34s – which is the best number we can give on a 100 MHz Pentium PC after optimizing the simulator codes. However, 34s is still too large for the digital simulator to reflect the continuous dynamics of the servo motor.

130

120

110

100

90

80 1

1.5

2

2.5

3 latency (ms)

3.5

4

4.5

5

Figure 10: The magnitude (%) of maximum overshoot: when Lx = 0:5ms. in Figure 13 (or Figure 14). As stated in Section 2, this implies that there is a trade-off between loop processing periods and latencies. The search algorithm in Section 2 can be improved if it can make use of the fact that there are equi-performance pairs of a loop processing period and a latency. For example, when the system is over-utilized, we may use (5ms, 0:5ms) pair to increase the period; or when the system is unschedulable due to a tight deadline, we may use (3ms, 1:5ms) to increase the deadline. We are currently improving the search algorithm based on this observation.

120

150 110

latency: 0.5ms latency: 1.5ms latency: 2.5ms 140

100

130

80 0.2

0.4

0.6

0.8 latency (ms)

1

1.2

1.4

output (%)

90

120

110

100

Figure 9: The magnitude (%) of maximum overshoot: when Tx = 2ms.

90

80

We also observed how the loop processing period and the latency affected the output response. Figure 11 and Figure 12 show the controller responses of both the analytical model and the simulated controller, when Lx is 0:5ms, 1:5ms, and 2:5ms, while Tx is 3ms. Obviously, we see that the maximum overshoot and the settling time grow as the latency increases. Conversely, Figure 13 and Figure 14 show the controller responses, when the latency is fixed and the loop processing periods vary. As expected, the maximum overshoot grows with the loop processing period. There is an interesting point to make: the output response when Tx = 3ms and Lx = 1:5ms in Figure 11 (or Figure 12) is very close to when Tx = 5ms and Lx = 0:5ms

0

0.05

0.1

0.15

0.2 time (ms)

0.25

Figure 11: Output responses when Tx results.

0.3

=

0.35

0.4

3ms: analytical

5 Conclusion We have presented a control theoretic approach to optimizing end-to-end timing constraints subject to the performance requirements and the schedulability constraint of a real-time control system. The approach includes (1) a

150 latency: 0.5ms latency: 1.5ms latency: 2.5ms 140

output (%)

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100

90

80 0

0.05

0.1

0.15

0.2 time (ms)

0.25

0.3

0.35

0.4

Figure 12: Output responses when Tx = 3ms: experimental results.

150 period: 1ms period: 3ms period: 5ms 140

output (%)

130

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110

100

90

generic real-time controller model which was developed based on the digital control theory, and (2) a heuristic optimization algorithm that derives end-to-end timing constraints. We applied the approach to the design of a CNC controller, and validated it through an experimental study using simulation. This study showed that the analytical model was sufficiently accurate that it could be used to design practical real-time control systems. It also revealed that a loop processing period and an input-to-output latency were a trade-off which needed a delicate balance for the optimal control performance. The work presented in this paper focused on the overall approach, and in particular on the control system aspects, and the validation of the approach through a case study. Not much attention was paid to the optimization problem; we are currently investigating the effectiveness of our heuristic method, and also looking at better strategies. One aspect of control performance that we have not considered in this paper is the output jitter. While it may significantly affect control performance, it is extremely difficult to mathematically analyze the output jitter. Jitter has a nonlinear effect on the behaviors of a real-time control system, while control theory is mostly based on the linear system model. We are investigating solutions to address this problem. The approach can be effectively used with PCM as its front-end. We are currently working to build a tool which incorporates both components. The result looks very promising.

80 0

0.05

0.1

0.15

0.2 time (ms)

0.25

0.3

0.35

0.4

References

Figure 13: Output responses when Lx results.

=

0:5ms: analytical

[1] R. Bettati and J. W. S. Liu. End-to-end scheduling to meet deadlines in distributed systems. In In Proceedings of the 12th International Conference on Distributed Computing Systems, pages 452–459, June 1992.

150 period: 1ms period: 3ms period: 5ms

[2] R. Gerber, S. Hong, and Manas Saksena. Guaranteeing real-time requirements with resource-based calibration of periodic processes. IEEE Transactions on Software Engineering, 21(7):579–592, July 1995.

140

output (%)

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120

[3] E. I. Jury. Theory and Application of the z-Transform Method. NY: R. E. Krieger Publishing Co., 1973.

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80 0

0.05

0.1

0.15

0.2 time (ms)

Figure 14: Output responses when mental results.

0.25

0.3

0.35

Lx = 0:5ms:

0.4

experi-

[4] N. Kim, M. Ryu, S. Hong, M. Saksena, C. H. Choi, and H. Shin. Visual assessment of a real-time system design: A case study on a cnc controller. In Proceedings of IEEE Real-Time Systems Symposium, pages 300–310. IEEE Computer Society Press, December 1996. [5] K. Ogata. Discrete-Time Control Systems. PrenticeHall, 1987.

[6] C. L. Phillips and H. T. Nagle. Digital Control System Analysis and Design. Prentice-Hall, 1995. [7] M. Ryu and S. Hong. A period assignment algorithm for embedded digital controllers. Technical Report SNUEE-TR-96-1, School of Electrical Engineering, Seoul National University, Korea, October 1996. [8] M. Saksena and S. Hong. Resource conscious design of distributed real-time systems: An end-to-end approach. In Proceedings, IEEE International Conference on Engineering of Complex Computer Systems, October 1996.

to the controller, while we derive the 100% rise time, 2% settling time, and maximum overshoot of the controller when a unit step input is applied. For the purpose of computation, we let

A = KspJKt ;

where J = JX (J = JY ) when X-axis (Y-axis) is modeled. As described in Section 2, we take the z -transform of the schematic model in Figure 15. As a result, we have Eq. (6) below. Note that we use the delayed (modified) z -transform [3], since the delay term e?sL is non-linear.

[9] D. Seto, J. P. Lehoczky, L. Sha, and K. G. Shin. On task schedulability in real-time control systems. In Proceedings of IEEE Real-Time Systems Symposium, pages 13–21. IEEE Computer Society Press, December 1996.

Go (z)

r(t)

Kp

e?sL

?esT s

1

= = +

A CNC Controller Modeling A CNC machine is an automatic control system which produces user-designed workpieces. The input of the machine is a reference trajectory of the workpieces and the output is the trajectory of the cutter which carves metal pieces. The basic function of a CNC machine is moving the cutter through a desired trajectory. We develop a mathematical model of a CNC machine possessing two axes of motion. A control loop corresponding to an axis is modeled with a schematic diagram in Figure 15 and a set of parameters listed in Table 2. These parameters are obtained from the specifications of the CNC hardware.

Gp (s)

c(t)

B = Kp K1 K2

B
z ?z 1
Zfe?sL s2 (sA+ A) g B
z ?z 1
f (z ?T 1)2 + ATA?(z A?L1)? 1 e?AT +AL A(z ? e?AT ) g

(Eq 6)

If we assume that x is sufficiently small, near zero, we can use an approximation ex = 1 + x. Using this, we get an open loop transfer function Go (z ).

Go(z)

= +

B
f (AT ? 1 + e?AT ? AL + ALe?AT )z g A (z ? 1)(z ? e?AT ) ?AT ? AT e?AT + AL ? ALe?AT g B
f1 ? e A (z ? 1)(z ? e?AT ) (Eq 7)

Since Go is a second-order equation, we get a second-order characteristic equation. 0

= +

Az2 + fB(AT ? 1 + e?AT ? AL + ALe?AT ) ? A ? Ae?AT gz fB(1 ? e?AT ? AT e?AT + AL ? ALe?AT ) + Ae?AT g (Eq 8)

Figure 15: A schematic diagram of a single axis CNC conK K K Kt . trol loop where Gp (s) = s(J1i s+2 Ksp sp Kt )

From Eqs. (7) and (8), we derive steady state error By the final value theorem, we have

Ess = Parameter

Kp K1 K2 Ksp Kt JX JY

Meaning proportional gain of P controller D/A transformation constant encoder constant proportional gain of velocity loop torque constant moment of inertia of X axis motor moment of inertia of Y axis motor

Value

: = =  : : :
: :
:

0 5657 120000 2047 24000 (2 ) 13 1 2054 2 29 0 00376 3 04 0 00376

Table 2: Parameters used in the CNC controller. Given the analytical model of the CNC controller, we derive the steady state error when a unit ramp input is applied

zT

lim f z!1 (z ? 1)Go(z)

g = B1

:

= 0 0091

Ess. (Eq 9)

We now derive the rise time Trise , settling time Tset and maximum overshoot Mpeak . First, we derive the roots (the magnitude r and angle , 0   < =2) of Eq. (8).

r

=



=

q fB ? e

?AT ? AT e?AT + AL ? ALe?AT ) + Ae?AT g (1 ?B (AT ? 1 + e?AT ? AL + ALe?AT ) + 1 + e?AT ?1 cos j A j 1

A

2

r

(Eq 10)

Then the natural frequency !n and damping ratio  are

!n

=

p

r + 2 ; T

log2



=

p? rr  log

log2

(Eq 11)

+

The 100% rise time Trise, 2% settling time Tset, and maximum overshoot Mpeak are derived as follows.

Trise

p ?

=2) + tan?1 ( p1?2 )

( =

!n

Tset

=

Mpeak

!n

=

100 exp

1

2

4

p
?(= 1?2 ) (%)

(Eq 12)