Executable Models and Verification from MARTE and SysML: a

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Executable Models and Verification from MARTE and SysML: a Comparative Study of Code Generation Capabilities Marcello Mura Amrit Panda Mauro Prevostini [email protected] [email protected] [email protected] ALaRI - University of Lugano

14 March 2008

Introduction

SysML

MARTE

Presentation Outline

1

Introduction

2

SysML

3

MARTE

4

Code Generation

5

Conclusions and Remarks

Code Generation

Conclusions and Remarks

Introduction

SysML

MARTE

Outline

1

Introduction

2

SysML

3

MARTE

4

Code Generation

5

Conclusions and Remarks

Code Generation

Conclusions and Remarks

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Introduction Rationale Automatic generation of code from High Level Modeling Languages helps dealing with the complex systems. Design: Requirements definition/validation Incremental Design Verification

Optimization: Reverse Engineering. Functional evaluation/optimization. Evaluation of non functional properties. Proposal

Use of the expressiveness of multiple UML2 profiles to improve code generation.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Introduction Rationale Automatic generation of code from High Level Modeling Languages helps dealing with the complex systems. Design: Requirements definition/validation Incremental Design Verification

Optimization: Reverse Engineering. Functional evaluation/optimization. Evaluation of non functional properties. Proposal

Use of the expressiveness of multiple UML2 profiles to improve code generation.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Introduction Rationale Automatic generation of code from High Level Modeling Languages helps dealing with the complex systems. Design: Requirements definition/validation Incremental Design Verification

Optimization: Reverse Engineering. Functional evaluation/optimization. Evaluation of non functional properties. Proposal

Use of the expressiveness of multiple UML2 profiles to improve code generation.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Introduction Rationale Automatic generation of code from High Level Modeling Languages helps dealing with the complex systems. Design: Requirements definition/validation Incremental Design Verification

Optimization: Reverse Engineering. Functional evaluation/optimization. Evaluation of non functional properties. Proposal

Use of the expressiveness of multiple UML2 profiles to improve code generation.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Introduction Rationale Automatic generation of code from High Level Modeling Languages helps dealing with the complex systems. Design: Requirements definition/validation Incremental Design Verification

Optimization: Reverse Engineering. Functional evaluation/optimization. Evaluation of non functional properties. Proposal

Use of the expressiveness of multiple UML2 profiles to improve code generation.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Modelling Language UML2 Adds new capabilities, achieves greater semantic accuracy and gives better support for code generation. Model Driven Architecture Defines a framework for Code Generation. Platform independent model are initially defined and then such models are refined for the particular platform. Profiles Means of tailoring UML for particular purposes. Extensions of the language can be inserted.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Modelling Language UML2 Adds new capabilities, achieves greater semantic accuracy and gives better support for code generation. Model Driven Architecture Defines a framework for Code Generation. Platform independent model are initially defined and then such models are refined for the particular platform. Profiles Means of tailoring UML for particular purposes. Extensions of the language can be inserted.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Modelling Language UML2 Adds new capabilities, achieves greater semantic accuracy and gives better support for code generation. Model Driven Architecture Defines a framework for Code Generation. Platform independent model are initially defined and then such models are refined for the particular platform. Profiles Means of tailoring UML for particular purposes. Extensions of the language can be inserted.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Target Languages

SystemC Represents a flexible choice. SystemC can be used from early design phases down to the implementation phase. Promela Is used for verification through the SPIN Model checker Other Possibilities VHDL, Verilog or similar languages can be used as target languages when HW systems are designed.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Target Languages

SystemC Represents a flexible choice. SystemC can be used from early design phases down to the implementation phase. Promela Is used for verification through the SPIN Model checker Other Possibilities VHDL, Verilog or similar languages can be used as target languages when HW systems are designed.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Target Languages

SystemC Represents a flexible choice. SystemC can be used from early design phases down to the implementation phase. Promela Is used for verification through the SPIN Model checker Other Possibilities VHDL, Verilog or similar languages can be used as target languages when HW systems are designed.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Code generation from Design Languages Commercial solutions Statemate by I-Logix StateFlow by Mathworks (part of Simulink) Research Efforts Generation of test cases. Behavioral Models. RTL and Synthesizable models UML definition of SystemC model Concerns Expressiveness and Performance

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Code generation from Design Languages Commercial solutions Statemate by I-Logix StateFlow by Mathworks (part of Simulink) Research Efforts Generation of test cases. Behavioral Models. RTL and Synthesizable models UML definition of SystemC model Concerns Expressiveness and Performance

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Code generation from Design Languages Commercial solutions Statemate by I-Logix StateFlow by Mathworks (part of Simulink) Research Efforts Generation of test cases. Behavioral Models. RTL and Synthesizable models UML definition of SystemC model Concerns Expressiveness and Performance

Introduction

SysML

MARTE

Outline

1

Introduction

2

SysML

3

MARTE

4

Code Generation

5

Conclusions and Remarks

Code Generation

Conclusions and Remarks

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

SysML Profile Rationale SysML is a graphical modeling language for specifying, analyzing, designing and verifying complex system. Internals SysML contains diagrams that are part of UML2, modified diagrams from UML2 and new diagrams. Scope SysML is particularly adapt for modeling HW/SW systems and aims at extending applicability of UML language to such context.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

SysML Profile Rationale SysML is a graphical modeling language for specifying, analyzing, designing and verifying complex system. Internals SysML contains diagrams that are part of UML2, modified diagrams from UML2 and new diagrams. Scope SysML is particularly adapt for modeling HW/SW systems and aims at extending applicability of UML language to such context.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

SysML Profile Rationale SysML is a graphical modeling language for specifying, analyzing, designing and verifying complex system. Internals SysML contains diagrams that are part of UML2, modified diagrams from UML2 and new diagrams. Scope SysML is particularly adapt for modeling HW/SW systems and aims at extending applicability of UML language to such context.

Introduction

SysML

SysML Profile

MARTE

Code Generation

Conclusions and Remarks

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Block Definition Diagrams Blocks are basic structural elements used to specify hierarchies and interconnections. BDDs describe the relationships between blocks. bdd System

> SoC1

> SoC2

parts module1 module2 flow ports inout flowPort_3





Introduction

SysML

MARTE

Code Generation

Block Definition Diagrams bdd SoC1_Structure

> SoC1 parts module1 module2

> module1 module1

values value_1 flow ports out flowPort_1: type in flowPort_2: type

flow ports inout flowPort_3

> module2 values module2

value_2 flow ports in flowPort_1: type out flowPort_2: type inout flowPort_3: type

Conclusions and Remarks

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Internal Block Diagrams

Describes the internal structure of a block specifying its interconnections. ibd SoC1

flowPort_1 flowPort_3

module1

module2 flowPort_2





Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Activity Diagrams

Used to specify the flow of input/outputs and control. ibd SensorNode





RF





Memory



Sensor

CPU

Actuator

act SensorNodeActivity [Activity Diagram]

a1: Measure

a2: Elaborate

[ThresholdOverflown]

a3: PerformAction [else]

a4: Store

[MemoryFull]

a5: Send [else]

a6: Idle

Introduction

SysML

MARTE

Code Generation

Activity Diagrams

act SensorNodeActivity [Allocation Diagram] allocatedTo SensorNode.Sensor

a1: Measure

allocatedTo SensorNode.CPU

a2: Elaborate allocatedTo SensorNode.Actuator

[ThresholdOverflown]

a3: PerformAction [else]

a4: Store

allocatedTo SensorNode.RF

[MemoryFull]

a5: Send [else]

a6: Idle

Conclusions and Remarks

Introduction

SysML

MARTE

Outline

1

Introduction

2

SysML

3

MARTE

4

Code Generation

5

Conclusions and Remarks

Code Generation

Conclusions and Remarks

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

General Remarks MARTE Fundamental tool in the design of Real Time Embedded Systems. Both modeling and analysis concerns are tackled. Semantic Richness Not all the profile can be used for code generation. Expressiveness of the target language may not be sufficient. Complementarity with SysML SysML does not have any particular mean to define timing issues while MARTE is particularly adapt for modeling such aspects.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

General Remarks MARTE Fundamental tool in the design of Real Time Embedded Systems. Both modeling and analysis concerns are tackled. Semantic Richness Not all the profile can be used for code generation. Expressiveness of the target language may not be sufficient. Complementarity with SysML SysML does not have any particular mean to define timing issues while MARTE is particularly adapt for modeling such aspects.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

General Remarks MARTE Fundamental tool in the design of Real Time Embedded Systems. Both modeling and analysis concerns are tackled. Semantic Richness Not all the profile can be used for code generation. Expressiveness of the target language may not be sufficient. Complementarity with SysML SysML does not have any particular mean to define timing issues while MARTE is particularly adapt for modeling such aspects.

Introduction

SysML

MARTE Profile

MARTE

Code Generation

Conclusions and Remarks

Introduction

SysML

MARTE Profile

MARTE

Code Generation

Conclusions and Remarks

Introduction

SysML

MARTE

Outline

1

Introduction

2

SysML

3

MARTE

4

Code Generation

5

Conclusions and Remarks

Code Generation

Conclusions and Remarks

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Framework Customizable Structure Compiler-like approach to enable framework expansion

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

SysML

Static Information Mapping SysML structures can be mapped to SystemC in the following way: Parts are mapped to modules. Flow Ports are mapped to ports Allocations are mapped to processes Behavioral Information Mapping State Diagrams are translated into SystemC processes source code.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

SysML

Static Information Mapping SysML structures can be mapped to SystemC in the following way: Parts are mapped to modules. Flow Ports are mapped to ports Allocations are mapped to processes Behavioral Information Mapping State Diagrams are translated into SystemC processes source code.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

SysML

Static Information Mapping SysML structures can be mapped to SystemC in the following way: Parts are mapped to modules. Flow Ports are mapped to ports Allocations are mapped to processes Behavioral Information Mapping State Diagrams are translated into SystemC processes source code.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

SysML

Static Information Mapping SysML structures can be mapped to SystemC in the following way: Parts are mapped to modules. Flow Ports are mapped to ports Allocations are mapped to processes Behavioral Information Mapping State Diagrams are translated into SystemC processes source code.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

SysML

Static Information Mapping SysML structures can be mapped to SystemC in the following way: Parts are mapped to modules. Flow Ports are mapped to ports Allocations are mapped to processes Behavioral Information Mapping State Diagrams are translated into SystemC processes source code.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

MARTE Timing Issues Chronometric Time Model: Implicit in the simulation engine. Discrete Time: Can be mapped through SystemC clocks. Dense Time: Is not mappable to SystemC. Clocks All the parameters for a clock object can be expressed through MARTE profile. sc time units (e.g. SC PS, SC NS etc) mapping is straightforward.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

MARTE Timing Issues Chronometric Time Model: Implicit in the simulation engine. Discrete Time: Can be mapped through SystemC clocks. Dense Time: Is not mappable to SystemC. Clocks All the parameters for a clock object can be expressed through MARTE profile. sc time units (e.g. SC PS, SC NS etc) mapping is straightforward.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

MARTE Timing Issues Chronometric Time Model: Implicit in the simulation engine. Discrete Time: Can be mapped through SystemC clocks. Dense Time: Is not mappable to SystemC. Clocks All the parameters for a clock object can be expressed through MARTE profile. sc time units (e.g. SC PS, SC NS etc) mapping is straightforward.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

MARTE Timing Issues Chronometric Time Model: Implicit in the simulation engine. Discrete Time: Can be mapped through SystemC clocks. Dense Time: Is not mappable to SystemC. Clocks All the parameters for a clock object can be expressed through MARTE profile. sc time units (e.g. SC PS, SC NS etc) mapping is straightforward.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

MARTE Timing Issues Chronometric Time Model: Implicit in the simulation engine. Discrete Time: Can be mapped through SystemC clocks. Dense Time: Is not mappable to SystemC. Clocks All the parameters for a clock object can be expressed through MARTE profile. sc time units (e.g. SC PS, SC NS etc) mapping is straightforward.

Introduction

SysML

MARTE

Outline

1

Introduction

2

SysML

3

MARTE

4

Code Generation

5

Conclusions and Remarks

Code Generation

Conclusions and Remarks

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Case Study

ibd SensorNode

measuredTemp

dataExchange





RF



data

extTemp

Sensor



CPU actionDecided

dataStored

Memory



action

Actuator

Introduction

SysML

MARTE

Case Study SC MODULE(CPU) { public s c i n measuredTemp : Temperature ; s c i n o u t data : I n f o ; s c i n o u t d a t a S t o r e d : I n f o ; s c o u t a c t i o n D e c i d e d : Impulse ; SC CTOR(CPU) { SC THREAD( e l a b o r a t e ) ; SC THREAD( s t o r e ) ; } void e l a b o r a t e ( ) void s t o r e ( ) }; SC MODULE( Sensor ) { public s c i n extTemp : Temperature ; s c o u t measuredTemp : Temperature ; SC CTOR( Sensor ) { SC THREAD( measure ) ; } void measure ( ) };

Code Generation

Conclusions and Remarks

Introduction

SysML

MARTE

Case Study

SC MODULE( A c t u a t o r ) { public s c i n a c t i o n D e c i d e d : Impulse ; s c o u t a c t i o n : Impulse ; SC CTOR( A c t u a t o r ) { SC THREAD( p e r f o r m A c t i o n ) ; } void p e r f o r m A c t i o n ( ) }; SC MODULE(RF) { public s c i n o u t dataExchange : I n f o ; s c i n o u t data : I n f o ; SC CTOR(RF) { SC THREAD( send ) ; } void send ( ) };

Code Generation

Conclusions and Remarks

Introduction

SysML

MARTE

Case Study

sc clock(clk1,10,SC NS,0.5)

Code Generation

Conclusions and Remarks

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Conclusions Conclusions The use of multiple UML profiles can improve code generation phase. MARTE can complement SysML models with timing information. Drawbacks Tool support for MARTE is to be improved. Structured documentation (i.e. book) would be beneficial. Future Work Refinement of the SystemC Mapping. Mapping to Promela/SPIN.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Conclusions Conclusions The use of multiple UML profiles can improve code generation phase. MARTE can complement SysML models with timing information. Drawbacks Tool support for MARTE is to be improved. Structured documentation (i.e. book) would be beneficial. Future Work Refinement of the SystemC Mapping. Mapping to Promela/SPIN.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Conclusions Conclusions The use of multiple UML profiles can improve code generation phase. MARTE can complement SysML models with timing information. Drawbacks Tool support for MARTE is to be improved. Structured documentation (i.e. book) would be beneficial. Future Work Refinement of the SystemC Mapping. Mapping to Promela/SPIN.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Conclusions Conclusions The use of multiple UML profiles can improve code generation phase. MARTE can complement SysML models with timing information. Drawbacks Tool support for MARTE is to be improved. Structured documentation (i.e. book) would be beneficial. Future Work Refinement of the SystemC Mapping. Mapping to Promela/SPIN.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Conclusions Conclusions The use of multiple UML profiles can improve code generation phase. MARTE can complement SysML models with timing information. Drawbacks Tool support for MARTE is to be improved. Structured documentation (i.e. book) would be beneficial. Future Work Refinement of the SystemC Mapping. Mapping to Promela/SPIN.

Introduction

SysML

MARTE

Code Generation

Conclusions and Remarks

Conclusions Conclusions The use of multiple UML profiles can improve code generation phase. MARTE can complement SysML models with timing information. Drawbacks Tool support for MARTE is to be improved. Structured documentation (i.e. book) would be beneficial. Future Work Refinement of the SystemC Mapping. Mapping to Promela/SPIN.