Noise Radar Design based on FPGA Technology: On-Board Digital Waveform Generation and Real-time Correlation Processing K. A. Lukin*, O. V. Zemlyaniy*, D. N. Tatyanko*, S. Lukin**, V. Pascazio** *
Department for Nonlinear Dynamics of Electronic Systems, LNDES O. Ya. Usikov Institute for Radiophysics and Electronics, NAS of Ukraine Kharkov, Ukraine
[email protected] **
Dipartimento di Ingegneria Universita degli Studi di Napoli Parthenope Napoli, Italy
[email protected] Abstract: The results on the use of arbitrary waveform generators that are based on FPGA technology for generation of complex signals in modern noise radars are presented. On the basis of these devices we propose a radar scheme with digital generation of noise waveforms for both sounding signal and reference and analog processing. Experimental results show efficiency of FPGA-based application in radar with variety of sounding waveforms. Multichannel time integrating correlator has been implemented in FPGA Xilinx Virtex 6 using X6-1000M board from Innovative Integration Inc. The developed correlator has a performance sufficient for design of noise radar according to the software defined radar concept for short-range applications, such as homeland security sensors, ground based SAR, and radar tomography enabling generation of 2D and 3D coherent SAR images and radiofilms.
1. Introduction Software Defined Radar concept which supposes realization of all radar units as digital circuits, has been applied to implementation of noise radar having such attractive features as covertness, absence of range ambiguities, high electromagnetic compatibility, etc. This novel concept requires design and implementation of digital random signal generators and digital correlators in fast integrated circuits such as FPGA. We present the results of our evaluation of the software defined noise radar design and demonstrate the corresponding digital sub-unit development on the basis of FPGA-based DSP board. In the experiments we generate noise signals in digital generator implemented in the FPGA, convert it to analog form and transmit it to propagation medium. Noise radar returns are sampled using onboard ADC and fed into a digital correlator, also realized inside FPGA, along with the sounding signal copy as the reference. The correlator output is processed using algorithms on hosted PC. Design of noise software defined radar using X6-1000M FPGA board from Innovative Integration Inc. [1] has been evaluated. Block-diagram of realization of software radar concept using FPGA is shown in Fig. 1.
The 18th International Radar Symposium IRS 2017, June 28-30, 2017, Prague, Czech Republic 978-3-7369-9343-3 ©2017 DGON
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Figure 1. Realization of software radar concept using FPGA
2. FPGA Board Instrument Description The X6-1000M board is a flexible IO module that integrates the signal processing core based on a Xilinx Virtex 6 FPGA with memory and a high performance PCI Express interface with the host computer. The X6-1000M board can sustain real-time transfers to the host computer at speeds reaching over 2 GB/s. It features two simultaneously running 12-bit 1 GSPS A/D channels. The sample clock signal can be taken either from an onboard low-jitter PLL or the external input. Multiple boards can be synchronized for sampling using the triggering and external clock features. The board also features four 16-bit, 500 MSPS D/A channels that can be used as two channels at 1 GSPS update rates. Features for coarse mixing and interpolation in the D/A devices expand the signal generation capabilities to Nyquist shifting and image control. The Xilinx Virtex 6 SX315 FPGA chip together with 4 banks of 1 GB DRAM provide a platform for a very high performance DSP core with over 2000 MACs. Close integration of analog IO, memory and host interface with the FPGA enables real-time signal processing at very high rates. The functionality of the computing core can be modified using the FrameWork Logic tools for the X6 board family. This firmware and software development kit implements an interface to each device that connects them to the controls and data communications features on the board. Support features, such as sample triggering and data analysis, are implemented in the logic to provide precise real-time control over the data acquisition process. The FPGA FrameWork Logic tools support development in either VHDL or MATLAB. The MATLAB BSP supports real-time hardware-in-the-loop development using the graphical, block diagram Simulink environment with Xilinx System Generator. Signal processing, data analysis and unique functions can be added to the X6-1000M board to suit application specific requirements. Software tools for host development include C++ libraries and drivers for Windows and Linux. The general view of X6-1000M board is shown in Fig. 2.
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Figure 2. General view of the FPGA based board X6-1000M from Innovative Integration Inc.
3. FPGA implementation of random waveform generators For digital generation of noise waveform, we used FPGA realization of a linear congruential algorithm which allows real time generation of pseudorandom sequence samples [2]. The linear multiplicative or congruential algorithm generates a sequence of pseudo-random integers X i ∈ [ 0, m ) based on the expression
X i +1 = ( aX i + c ) mod m ,
(1)
where a > 0 , c ≥ 0 , m > 0 are some integer constants. Properties of generated sequence are determined by the values a , c and m , but its particular type is given by starting value X 0 . The sequence of numbers generated by this algorithm is periodic with a period of not more than m . The length of the period is equal to m if and only if the following conditions are satisfied: c and m are coprime; a − 1 is multiple of p for all primes p that are dividers of m ; a − 1 is multiple of 4, if m multiple of 4. For 8-bit device the value of m can not exceed 28 = 256 , therefore the maximum length of the sequence is equal to 256. When choosing constant values according to the above conditions a = 173 , c = 163 , m = 256 , X 0 = 23 we obtain the pseudorandom sequence shown in Fig. 3.
a)
b)
Figure 3. Time series (a) and autocorrelation function (b) of pseudorandom sequence, generated using LCG with parameters a = 173 , c = 163 , m = 256 , X 0 = 23
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Using LCG we were able perform on-board generation of chaotic and pseudorandom sequences of different types. Fig. 4 shows output of FPGA-based generator producing pulsed waveform with pseudorandom filling, obtained via implementation of LCG algorithm (1) with parameters mentioned above.
a) b) Figure 4. Pulsed waveform with LCG pseudorandom filling (a) and Random PRF LCG-filled pulse generator output (b)
It should be noted that several simple techniques can be employed to improve this LCG in the future, for instance, increasing the m value up to 232 and beyond, then use N most significant bits of the result as generator output, where N is the required result width in bits (this parameter is usually constrained by the DAC's resolution). The generator developed utilizes the aforementioned LCG algorithm not only for generating pseudorandom filling for the pulses, but also for achieving random pulse repetition frequency (PRF) capability. The two LCG generators work independently in this case. Typical view of generated waveform of this type is shown in Fig. 4. The waveforms were obtained using VHDL code simulation in ModelSim environment. The results presented here allow us make conclusion about versatility of the method, as it allows creating in a program part of FPGAs memory a set of different algorithms and quickly switch between them without the need to reprogram the entire device for the desired type of signal.
4. Parallel 128-Channel Time Integrating Correlator Implemented in FPGA Estimation of cross-correlation function of two random signals enables optimal reception of radar returns in coherent radars, and in particular in Noise Radar (NR) [3]-[5]. Under assumptions of ergodicity and stationarity of the transmitted NR signal u(t) and NR return ν(t) their cross-correlation function may be estimated as follows: 1 T →∞ 2T
R (τ ) = lim
T
v ( t ) u ( t − τ ) dt .
(2)
−T
In many applications the samples of the correlation function (2) are needed for multiple delays τ simultaneously. For example, in NR receiver this enables obtaining range profile, showing dependence of radar return levels at the related ranges. After sampling of N samples of both transmitted (reference) and received (radar return) signals we get their digital copies, and (2) may be substituted with the following expression: 4
Km =
1 N
N
A n =1
n− m
Bn ,
(3)
where A and B are the reference and radar returns signals, respectively; m is integer delay between the signals; N is the number of signals samples. It is seen from (3) that computation load depends on the number of range bins N. Digital estimation of cross-correlation function according to (3) requires multiple executions of three operations: signals’ shift in time, their multiplication and summation. Each of these operations can be easily implemented in FPGA. There are several approaches to the design of a digital time integrating correlator. In this work, we have chosen the one which is most appropriate for implementing in CW NR as software defined radar [4], that is based on digital signal generation [5] and processing in real time. The correlator was developed in the Matlab/Simulink environment using component libraries supplied with the Xilinx System Generator toolset for programming of FPGA ICs. Block-diagram of the correlator suggested for the case of eight channels (which is the kernel of more extended versions of multichannel correlator) is shown in Fig. 5.
Figure 5. 8-channel correlator (sub-unit of 128-channel correlator)
For implementation of the parallel correlator we used the X6-1000M FPGA board from Innovative Integration Inc. [1]. The developed correlator enables real-time estimation of the correlation function with a fixed number of range bins for a certain integration time. The integration time is mainly limited by number of bits used in the digital integrators of the FPGA-based correlator. We have realized 128-channel correlator with 32-bits integrators. This correlator operates at a clock frequency up to 200 MHz. Data is delivered to a buffer and transferred by means of "Stream" application serially to RAM of the host computer for further processing. The correlator test results using input noise waveforms for the case of 1000 and 10000 averages are presented in Fig. 6.
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a) b) Figure 6. Autocorrelation function of noise waveform, streamed via correlator output (zero path difference of reference and signal input waveforms). Bandwidth of noise waveform with Gaussian power spectrum shape is 10 MHz: (a) - 1000 averages; (b) - 10000 averages
The results presented in Fig. 6 confirm correct operation of the correlator developed. Namely: decrease of the residual fluctuations in cross-correlation function with the increase in integration time (Fig. 6a vs Fig. 6b). It is also shown that increase in power spectrum bandwidth leads to narrowing of the main lobe of correlation function. Performance of the Virtex 6 FPGA allows to develop 256 and 512 channels correlators which is sufficient for many realistic short range applications of NR, such as homeland security sensors, ground based SAR and radar tomography to produce 2D and 3D coherent SAR images and radiofilms, etc. Relatively large FPGA hardware resources needed for implementation of the above timeintegrating correlator are the main constraints for its applications in long-range radar. Below we briefly describe a possibility to go around that constrain with the help of so-called relay correlator. In relay correlator, the signal in its reference channel is substituted with its binary copy. As it was shown in [6], the normalized relay cross-correlation function for two Gaussian random processes is linearly proportional to the normalized conventional cross-correlation function. For the binary random signal, a digital tapped delay line may be readily implemented as a shift register line or RAM memory based delay line. Using this approach, we designed digital-analog correlator, where binary reference was delayed in binary digital delay line, while cross-correlation of the binary reference and analog radar return has been implemented in an analog mixer followed by low-pass filter as integrator. This approach may be used for design of an advanced digital correlator in FPGA. Furthermore, for binary signals in the cross-correlation function the multiplication operation may be substituted with a simple logic operation, which enables excluding the usage of multipliers in the digital correlator scheme. The latter allows essential reduction of the FPGA resources need for estimation of cross-correlation function in Noise Radar receiver.
5. Conclusions The results on the use of FPGA-based devices for the generation of pseudo-random signals for noise radars are presented. Exploiting of linear congruential algorithm for time series generating in real time using a FPGA evaluation board has been demonstrated. We also assured that digital scheme for noise signal generation allows controlling spectrum shape of sounding signal and is very attractive for use in modern noise radars. 6
Multichannel time integrating correlator has been, implemented and tested in FPGA Xilinx Virtex 6 using X6-1000M board from Innovative Integration Inc. For testing of the designed correlator we have used both analog noise signals and pseudo-random signals generated in FPGA. After evaluation of the cross-correlation function, the data from the FPGA have been transferred to the host PC for processing, display, etc. Analysis of the results has shown that the developed correlator has rather good performance and may be used for short-range applications, such as homeland security sensors, ground based SAR, radar tomography, radio camera, etc. A new implementation of relay correlator for FPGA has been suggested and tested. The approach suggested enables exclusion of usage of multipliers that saves FPGA resources and, hence, increases number of parallel channels in digital time integrating correlator, which, in particular, extends the working range of Noise Radar.
References [1]. Innovative Integration. X6-1000M [Online]. Available: http://www.innovativedsp.com/products.php?product=X6-1000M [2]. Binder K. Applications of Monte Carlo methods to statistical physics // Rep. Prog. Phys. 1997. Vol. 60, No. 5. P. 487-559. [3]. K. A. Lukin, “Noise Radar Technology,” Radiophysics and Electronics, vol. 4, no. 3, pp. 105111, 1999. [4]. K. A. Lukin, “Noise Radar Technology: the principles and short overview,” Applied Radio Electronics, vol. 4, no. 1, pp. 4−13, 2005. [5]. K. A. Lukin, P. L. Vyplavin, O. V. Zemlyaniy, V. P. Palamarchuk, S. K. Lukin, “High Resolution Noise Radar without fast ADC,” International Journal of Electronics and Telecommunications (JET), vol. 58, no. 2, pp. 135-140, 2012. [6]. D.G.Watts, “A general theory of amplitude quantization with applications to correlation determination”, The Inst. of Electrical Engineers, Monograph No.481M, Nov. 1961.
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