Optoelectronics Recoded Trinary Signed-digit Adder ... - IEEE Xplore

OPTOELECTRONICS RECODED TRINARY SIGNED-DIGIT ADDER USING OPTICAL CORRELATORS Abdallah K. Cherri and Mahmoud K. Habib

Mohammed S. Alam

Kuwait University College of Engineering and Petroleum Department of Electrical & Computer Engineering P.O.Box 5969 Safat 13060 Kuwait Fax: (965)481- 7451 E - mail: cherri @ eng. kuniv. edu. kw

Abstract A symbolic substitution based optoelectronics numeric processor using the recoded trinary signed-digit (TSD) number representation is presented. The proposed technique performs parallel carry-free addition in constant time, independent of the operand length. The proposed trinary adder is more efficient compared to a similar alternate technique that uses the modified signed-digit (MSD) number representation. The trinary adder is compact since it employs only one correlator rather than three correlators as it was reported for the MSD counterpart. Further, it can handle much larger dynamic range since TSD uses much fewer digits than MSD in its representation for the same decimal numbers.

Introduction Optical computing provides an attractive approach of attaining ultra-high-speed computing since it can process amounts of data in parallel, at a high-speed, with high temporaVspatia1 bandwidth and noninterrfering communications. The primary limitations of the computing speed based on the binary number system is the formation and propagation of carry or borrow bits especially as the number of bits increases [ 1, 21. In order to reduce or restrict the delay caused by carry propagation in the arithmetic operations, the operands can be represented in some special number systems other than binary. Several non binary number representation schemes such as multiple-valued fixed radix-number, residue number, redundant number, and signed-digit [3-51 were reported in the past decade to implement efficient arithmetic operations. Signed-digit number (modified signed-digit) representations limit carry-propagation to one (two) position to the left during the operations of addition and subtraction in digital computers. The carrypropagation chains are eliminated by the use of redundant representation for the operands [61. Bocker et al. [7] were the first to utilize the modified signed-digit number system for optics

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Purdue University Department of Engineering Fort Wayne, Indiana 46805 - 1499 Tel: (219)481- 6020 Fax: (219)481-5728 E - mail: alam 8engr. ipfw. indiana. edu

where the computation can be performed in parallel. Various optical symbolic substitution (SS) [8-201based signed-digit and higher-order signeddigit systems have been reported. Three-step [5,7, 91,two-step [lo-123,and one-step [13,141 carryfree addition and borrow-free subtraction are performed by checking a pair (or pairs) of reference digits. High-radix based signed-digit number system such as the trinary signed-digit (TSD) number system allow higher information storage density, less complexity, fewer system components, and fewer cascaded gates and operations [ 15-19]. Recently, Alam 1201 has introduced a highly parallel and a simple recoded trinary signed-digit algorithm. The scheme performs TSD operations based on the method of content-addressable memory (CAM). However, the CAM methods suffers from the disadvantages that the reference patterns is proportional to the length of the input operands. Therefore, the number of reference patterns becomes large when high accuracy calculation is performed [15,17,211. On the other hand, Casasent et al. [9,181 has proposed an alloptical numeric coprocessor using a page-oriented optical memory and a cascade of three optical correlators to process modified signed-digit (MSD) data. Casasent et al. [9] has shown that the performance of the optical coprocessor is superior to the fastest electronic microprocessors. Casasent et. a1 exploited the parallel symbolic substitution algorithm for MSD arithmetic in order to reduce the number of cycles required to three. Further, MSD spatial encodings are used to reduce the number of steps in the recognition and substitution steps. A set of correlation filters were derived to combine the recognition and the substitution steps. In this paper, we propose a symbolic substitution based optical numeric processor using the recoded TSD number representation [20]. The proposed technique performs parallel carry-free addition and borrow-free subtraction in constant time, independent of the operand length. Optoelectronicsimplementation of the proposed adder is feasible because the recoding algorithm of the TSD number representation is totally parallel. CH36015-97/0000-0495 $1.0001997 IEEE

Therefore, a fast electronics hardware unit can be designed to process the recoding algorithm and the addition step can be performed optically in one step. The proposed recoded TSD optical adder is faster and more efficient than the existing MSD counterparts used in Reference 9.

must be eliminated from the augend and the addend operands. Table 1 illustrates a simple recoding truth table for generating carry-free addition where dwVz and dxwz indicate partial don't care literals 1201. Therefore, an n-digit TSD number A = A,, A,,-l A,,-2 A,& when recoded with Table 1 results in an (n+l)-digit recoded TSD number = c,,-l ... CO such

...

Trinary signed-digit numbers (TSD)

c cn+l c,, c,,-* c, thatboth A and c arenumericallyequal. The

In a radix-r redundant signed-digit number . . ., -1, 0, 1, . . ., a } system, the digit set (-a, assumes (2a + 1) values where a I r- 1. For trinary - signed-digit r = 3 and the digit set is ( 2, 1, 0, 1, 2). Here the digits 2 and i represent -2 and -1, respectively. In general, a decimal number D may be represented in terms of an n-digits trinary signed-digit number as

j=O

recoded TSD output

of Table 1 does not

include the 3 and 2 literals. Thus the recoding - operation maps the TSD set { 2, 1,0, 1, 2) into a smaller set ( i , 0, 1). The addition truth table corresponding to the recoded TSD output of Table 1 is shown in Table 2, where Ai and Bi , and

si represent addend, augend, and sum operands, respectively. Note that it is necessary for us to pad three zeros trailing the least significant digit and one zero preceding the most significant digit in order to apply Table 1to recode the TSD numbers. Also, note that the recoding algorithm of the TSD number representation is totally parallel. Therefore, a fast electronics hardware unit can be designed to process the recoding algorithm.

- -

where bi digit is selected from the set { 2, 1,0, 1, 2 ) to produce the appropriate decimal representation. A TSD negative number can be obtained directly by complementing the corresponding TSD positive number. For example, using primes to denotes complementation, we have - 2' = 2, 2' = 2, 1' = 1, 1' = 1, and 0' = 0, and therefore, (14)lo = [2 i 1

ci

SS Cascaded Correlator Architecture

1 ~or,s equivalently, ~

(14)10 = [2 2 21TSD = [12i]TSD = E1121TSD. Subtraction of two TSD numbers can be obtained by first complementing the subtrahend and then an addition operation is applied. The addition (subtraction) of two TSD numbers (A and B) involves two (three) steps: the first step (the first and the second) generates intermediate carry and intermediate sum digits which are then summed, the second (the third) step, to give the final sum (difference). For illustration, consider the following TSD numbers and their corresponding binary and decimal representation:

The SS [8] is an algorithm for performing digital computing on information present in a 2-D input image. In this algorithm, a specific group of spatially oriented 2-D pattern is first recognized and then another set of 2-D pattern is substituted for it in that location. Thus SS consists of two pattern processing steps: (1) a recognition phase where all the occurrences of a search pattern are simultaneously searched in the input image, and (2) a substitution phase where a scribe pattern is substituted in all the locations where the search pattern are found. Recently, Casasent et. a1 [9, 181 proposed the basic correlators architecture shown in Fig. 1 to implement the SS algorithm where the first correlator (Pl-P3) performs the recognition phase and the second correlator (P3-P5) performs the substitution phase. Planes P2 and P4 contain matched spatial filters (MSF) that have the recognition and the substitution symbols encoded in them. The peak intensities appearing at P3 that correspond to the recognized symbols at the input P1 are substituted by the required substitution symbols using the MSF at P4. Thus P5 has a substitution symbol that corresponds to each occurrence of the recognition symbol in the input P1. The description of the cascaded correlation in the previous paragraph represents the execution of one SS rules. In general, there are several SS rules for optical computation. Consequently, one may use multiple space- and frequency-multiplexedfilters [9, 181 at P2.

(2213 = ( l o w 2 = @)lo (22222222222222213 = (110110101111001001101010)~ = (14348906)lo In the first example we observe that at most we need four bits to represent a two-digit TSD number. In the second case we need a maximum of 24 bits to represent a 15-digit TSD number. In the two example cited, the TSD number system requires 50-37.5% fewer digits than the binary number system, which may result in substantial saving of memory space. On the other hand, when studying the TSD representation for the addition of two single digits, it is found that the combination digits (1,2), or (2, - -2), or ( 2, 1), or ( 2, 2) cause a carry propagation to the next higher-order digit. For carry-free addition, the aforementioned digit combinations 496

Table 1. Recoding truth table for TSD numbers.

1

2 -

0

0 1 0 1

2 2 -

2 2

15

z-

1 1 1 -

1 0

1 1

3

0

1

4

1 1 1 1 1

1 1 1

2 2

1 1 -1

2 2 2

6

7

-

1

1

-1

1

1

1 1

1

-1

1

1

1 1 1 1 1

2 2 2 2 2 -

-1

2

0

z-

2 2

2 2

0

1

0 0

13

0

0

14

1 1 1 1 1

0 0 1 0 1

497

2

1

1 1 1 1

-

1

-1

1 1 1

-1 -1

-1

z 1 1 1

0

24

2

1 1 1 1 1

2 2 2 2 2

1

z

2

25

1

2 2

23

2 2 2 2

0 1

1 0 1

2 2

-1

1 1 1 1 -

2 2 2 2 2 2

1

2 2 2

2

2 2-

12

1

1 1

22

0

0 1 0 1

1

-

1 0 1 0

1 -1 1 -

0 1

19

1 1

1

2

0 0 1

0

1

I i 0 -

2 2 2 -

1

1 -

1 -

-2

18

-1

1 1 1 1 1

11

1 -

-1

9

1 1 1

-

1' 1

1 1

21

0

1 1 1

1

-1

8

2

1 0

1

1

-1

1

10

17

20

1 -1

0

1

1 -1 1 -1 1

2 2 2 2 2

0 0

1

1 1

5

16

0 -

0

2 2 2 2

0 0

2 2

1 1 -1 1

1 -1 1

0 1 0

1

0 -

2

1

2

0

2

0

P1

P2

L1

1 input

recog.

L3

P4

subst. ~

~

~

threshold device

~

I

P3

L2

filter

correlator 1 (recognition)

II

~

filter

fi

output ~

I

I

correlator 2 (substitution)

Fig. 1 Basic SS cascaded correhtor arcbiteeture after Reference 9.

498

P5

L4

Recoded TSD adder The above-mentioned SS-based correlator was used to perform modified signed-digit (MSD) addition. The MSD addition is a three-stage process, and thus six cascaded correlators are necessary for fully parallel operations. However, it was she-wn [9] that the number of correlators can be reduced to three when each pair of recognition and substitution correlation stages are combined into a single correlator with one filter. This can be achieved if each SS stage is formulated as a matrixvector (M-V)multiplication (y = Mx) for each input of the recognition digits (the input vector x) and the associated pair of the output substitution digits (the output vector y). The unknown matrix M is the solution of this M-Vmultiplication and it is used as the MSF filter at P2 of Fig. 1. For our proposed recoded TSD adder a single S S stage with one correlator is enough to carry the addition operation for the nine computation rules shown in Table 2. Therefore, in Table 2, the second column represents the input recognition digits and the third column represents the output substitution digits. Four-pixel per digit can be used to encode the TSDs as shown in Fig. 2. To save space, we use the symbols 0 , z, ob, t, and tb to represent the input pixel patterns for the TSD encoding for 1, 0, 2, and 2, respectively. The nine possible inputs TSD of Table 2 can be written as the columns of the input matrix X: 0

z

z z

o

z

ob o z ob

1

obobob o 'Z ob

i

1

2

Z

b

0

z

b

z

b

b

+

+

+

+

+

i).

plus Therefore, three columns from the X and Y matrix can be eliminated. Now it is necessary to introduce new encoding to replace that of Fig. 2 [22] by superimpose (OR)all the encoded digits for each operands. The new encoding is shown in Fig. 3 and the new X input matrix is given as

X=[o+o

O+Z

o+ob

Z+Z

z + o b ob+ob]

where the symbols '+' denotes a logical OR and not a sum. The corresponding output Y matrix is Y=[t o z z ob tb] Using the encoding of Figs. 3 and 2 in the corresponding X and Y input and output matrices, respectively, we obtain

0 1 0 1 1 0

and

In order to reduce the spatial bandwidth product (SBWP) and hence increase the throughput for a given SLM,it is preferable to reduce the number of columns in the X matrix. This can be achieved by noticing that the order of the operands does not affect the resultant sum (i.e., 1 plus 0 yield the same sum as 0 plus 1, 1 plus 0 yield the same sum as 0 plus 7, and plus 1 yield the same sum as 1

-

z

1 1 1 0 1 1

Y=[t o z o z ob z ob tb]

0

o

Fig. 3. New four-pixel TSD encoding.

The nine corresponding output substitution patterns TSD of Table 2 can be written as the columns of the output matrix Y:

1

o

+

i,

x=[0o

0

0 1 0 1 1 0 0 1 0 0 1

0 0 1 1

1 0 0 0 1 0 0

The solution matrix M of Y (which is the required MSF ) is

= MX equation

0.54 -0.18 -0.45 0.82 0.36 0.54 -0.64 0.54 0.09 -0.36 1.09 -0.36 -0.91 0.64 1.09 -0.36 Note that because the X matrix is not a square, a non-exact pseudoinverse M matrix solution is obtained. Therefore, a thresholding of the P3 output correlation plane is needed to yield the exact results. Using the M matrix in P2, yield the following Y matrix:

-

2

Fig. 2. Four-pixel TSD encoding.

499

0.36 0.91 y = w = -0.27 -0.27

0.73 -0.09 0.36 0.91 0.09 0.82 0.27 -0.09 0.27 -0.27 0.45 0.82 0.73 0.82 1.18 0.45 0.82 0.73 -0.18 0.18

After thresholding at 0.5 value we obtain the exact correct output:

Y = thresh(MX) =

1 1 0 0 0 0 0 0 1 1 1 1 100 1 1 001

It is worth mentioning that the encoding of the TSDs is not unique. For instance, the encodings of Fig. 4 can be used in the X and Y matrices and the following results are obtained:

0 0 1 0 1 1 1 1 1 1 1 0 11 1 1 0 0 0 ]

0

0

0

Z

Z

+

+

+

+

+

0

z

b

z

b

b

+ b

Fig. 4. Alternative encodings for the recoded TSD adder.

Conclusions 1 0 Y= 0 1

0 0 1 1

1 0 1 0

-0.64 M = [ 0.1 1.36 0.09

1 0 1 0

1 1 0 0

0.54 0.64 -0.45 -0.36

1

0 1 1 0

1.36 0.09 -0.64 0.09

We have presented a compact optoelectronics recoded TSD adder. A detailed design methodology for the trinary input encodings as well as the required optical matched spatial filters in the optical correlator were presented. Our proposed recoded TSD adder is more efficient than the MSD counterparts which was reported in Reference 9. Firstly, it reduces the system size and complexity by employing only one correlator instead of three correlators; and secondly, it can handle much larger dynamic range since TSD representation uses much fewer digits than MSD to represent the same decimal numbers. By reducing the hardware requirements and increasing the data dynamic range, our proposed trinary-based adder becomes more attractive for practical implementation.

-0.45 -0.361 0.54 0.64

0.91 0.27 0.82 0.73 1.27 -0.09 -0.27 -0.81 0.45 0.18 0.82 0.73 -0.09

1.27

0.73

0.82 0.45 0.18 -0.18 -0.27

' 0 Y = thresh(MX) = 0 1

0.82 0.73

0.27

0.91

Acknowledgement Dr. Abdallah K. Cherri would like to acknowledge the support of Kuwait University Research Administration grant NO. EE086

1

1 0 1 1 1 0 0 0 0 1 1 1 1 1 0 1 1 0 0 0 0

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digit symbolic substitution", Appl Opt, 31, 1992, pp 5614-5622.

[2] K. Hwang, Computer Arithmetic Principles: Architecture and Design, WILEY Publishing Co., New York, 1979.

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[16] A. K. Cherri, N. I. Khachab, "Canonical quaternary signed-digit arithmetic using optoelectronics symbolic substitution", Optics & Laser Technology, 28,1996, pp 397-403.

[4] A. P. Gautzouilis, E. C. Malarkey, D. K. Davies, J. C. Bradley, P. R. Beaudet, "Optical processing with residue LED/LD lookup tables", Appl Opt. 27,1988, pp 1674-1681.

[17] A. A. S. Awwal, M. N. Islam, M. A. Karim., "Modified signed-digit trinary arithmetic by using symbolic substitution", Appl Opt, 31, 1994, pp 1687-1694.

[5] A. K. Cherri, M. A, Karim, "Modified signed digit arithmetic using an efficient symbolic substitution", Appl Opt, 27, 1988, pp 3824-3827.

[18] D. P. Casasent, E. C. Botha, "Multifunctional optical processor based on symbolic substitution" Opt. Eng., 28,1989, pp 425-433.

[6] A. Avizienis, "Signed-digit number representations for fast parallel arithmetic", IRE Trans. Electronic Computers , EC-10, 1961, pp 389-400.

[19] M. S. Alam, Y. Ahuja, A. K. Cherri, A. Chatterjea, "Symmetrically recoded quaternary signed-digit arithmetic using a shared contentaddressable memory", Opt Eng, 35, 1996, pp 11411149

[3] S. L. Hurst, "Multiple-valued threshold logic: its status and its realization", Opt Eng 25, 1986, pp

[7] R. P. Bocker, B. L. Drake, M. E. Lasher,T. B. Henderson, "Modified Signed-digit addition and subtraction using optical symbolic substitution", Appl Opt, 25, 1986, pp 2456-2457.

[20] M. S . Alam, "Parallel optical computing using recoded trinary signed-digit numbers", Appl Opt, 33,1994, pp 4392-4397. [21] M. M. Mirsalehi,T. K. Gaylord, "Logical minimization of multilevel coded functions", Appl Opt, 25, 1986, pp 3078-3088.

[SI A. Huang, "Parallel algorithm for optical digital computer", in Proceedings of the IEEE 10th International Optical Computing Conference, pp 13-17 (1983).

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Biographies [ 101 A. K. Cherri,"Symmetricallyrecoded modified

signed-digit optical addition and subtraction" Appl Opt, 33, 1994, pp 4378-4382.

Dr. Abdallah Cherri is an associate professor with the Department of Electrical and Computer Engineering at the Kuwait University. He received his BS and MS degrees in electrical engineering from the Wichita State University (Wichita, Kansas) in 1984 and 1985 respectively, and his Ph.D. degree in electrical engineering (with specialization in optical computing) from the University of Dayton (Dayton, Ohio) in 1989. Dr. Cherri was an associate professor with the Department of Electrical & Computer Engineering at the University of Michigan-Dearborn from 1989 to 1993. Dr. Cherri's research interests are optical computing, display devices, optical pattern recognition, digital/optical image and signal processing, and electro-optics. He has published numerous journal and conference proceedings papers.

[ 111 Y. Li, G. Eichmann, "Conditional symbolic modified-signed-digit arithmetic using optical content-addressable memory logic elements", Appl Opt, 26,1987, pp 2328-2333.

[12] B. Ha, Y. Li, "Parallel modified signed-digit arithmetic using an optoelectronic shared contentaddressable-memory processor", Appl. Opt, 33, 1994, pp 3647-3662. [13] H. Huang, M. Itoh, T. Yatagai, "Modified signed-digit arithmetic based on redundant bit representation", Appl. Opt, 33, 1994, pp 61466156. [14] H. Huang, M. Itoh, T. Yatagai, L. Liu, "Classified one-step modified signed-digit arithmetic and its optical implementation", Opt Eng., 35, 1996, pp 1134-1140. [15] M. S. Alam, M. A. Karim, A. A. S. Awwal, J. J. Westerkamp, "Optical processing based on conditional higher-order trinary modified signed-

Dr. Mahmoud. K. Habib received the BSEE, MS, and PhD in 1974 and 1978, respectively, fromuniversity of Delaware, Newark, all in electrical engineering. He was a professional engineer at the Ministry of Communication before joining the Faculty of

501

Engineering of Kuwait University, as chairman of the Electrical and Computer Engineering Department. He chaired a meeting om Arabic speech processing and computer applications held in Kuwait. His interest is mainly in speech signal processing and biomedical signal processing. His research interests includes speech signal processing, neural information processing systems, and special-purpose digital systems.

Dr. Mohammed S . Alam is an associate professor of electrical engineering at Purdue University, Fort Wayne, Indiana University Bloomington. He received his BS and MS degrees in electrical engineering from the Bangladesh University of Engineering and Technology in 1983 and 1985, respectively, his MS degree in Computer Engineering from Wayne State University in 1989, and his Ph.D degree in electrical engineering from the University of Dayton in 1992. He is the principal authors of more than 60 published papers including 37 articles in refereed journals. His research interests include digitalloptical signal and image processing, optoelectronics computing architecture and algorithms, fiber optics, and digital systems design.

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