A Signal Processing Hardware Based on Application ...

3 downloads 1712 Views 229KB Size Report
and external IOs can be done in a sophisticated way. External devices ... same interface has been used for downloading code in FLASH of hardware. Processor.
A Signal Processing Hardware Based on Application Specific Integrated Circuits Jamshed Iqbal1, Gulistan Raja2 University of Engineering & Technology, Taxila Pakistan 1 [email protected],[email protected] Abstract Each electronic system demands a solution that is efficient in area and power. This research proposes design of a hardware system for data processing applications especially for applications that require low power. The system comprises of an embedded processor and different interfaces for text, audio and image processing. Transceiver interface provides compatibility of hardware with RS232 devices. The designed hardware integrates a FIFO buffered CODEC interface. The interface is designed to support 8-bit, mono audio input and output at a sampling frequency of 8 KHz. For short distance communication IR interface is provided. For storage of code and data, hardware incorporates memory interface. The analog to digital converter on the proposed hardware is a 10-bit, 8-channel converter. It performs conversions for the touch-screen interface, on-board voltage monitoring and an external analog input. For handling IO, there is provision of keyboard and on-board LCD. Simulation of interfaces has been done in Mixed Signal Circuit Simulator. Selection of processor as well as components has been based on power requirements along with other issues. Power consumption has been further reduced by employing techniques like auto-shut down etc. Power consumption of different blocks in operating state varies from 178.2 uW to 50mW Finally, a 6.8 X 4.5 inches multi-layer PCB comprising of 4 layers has been simulated and designed. The proposed hardware system is capable of handling text, audio and image data although it can also be used for other types of multimedia with slight modifications. Key words: Signal processing hardware, Low power system, ARM based system 1. System Overview The system should has the capability to process text, audio and image date, so there is an embedded processor and a number of IO devices & interfaces. There are two RS232 interfaces for compatibility with RS232 devices, IR interface for short distance communication, memory interface for storage of code and data, audio CODEC interface for processing of audio data and LCD and keyboard interface for IO. A switch mode power supply unit (PSU) has been designed to meet power requirements of proposed hardware. Block diagram of system is shown in fig. 1 Published in ‘New Horizons’, Journal of Institute of Electrical & Electronics Engineers, Vol. 54, 2006, pp. 24-27.

L C D PB [7:0]

DC I/P Battery

PSU PD [7:0] & Comp. PE [7:0] DRIVE [1:0]

DC to DC Converter

FB [1:0] SSIRXDA

CODEC

SSITXDA PHDIN

IR Led & LEDDRV Photodiode 2* RS 232 Transceivers

DD [3:0] COL [7:0]

C O N T ARM R 720T O L L E R

PA [7:0]

Keyboard

D [31:0] A [27:0]

DRAM D [31:0] A [27:0]

FLASH GPIO

Temperature Sensor

RXD

ADCIN

TXD

ADCOUT

ADC

DIGITIZER

Figure 1. Block Diagram of Proposed Hardware 2. Designed Interfaces Interfaces which let the hardware to process text, audio and image data include: • • • • • •

2.1

Audio Interface Memory Interface RS 232 Interface Infrared Interface LCD and Keyboard Interface ADC (Digitization Interface)

Audio Interface

The designed hardware integrates a FIFO buffered CODEC interface. The interface is designed to support 8-bit, mono audio input and output at a sampling frequency of 8 KHz. The CODEC may be configured to support either µ-law or A-law. The output driver is capable of operating an 8-Ω speaker while the input is to be used with a standard PC external microphone. Switch controlled recording and playing back facility has also been provided. The input signal is passed through the pre-amplifying stage, which amplifies the signal. Analog amplifier has been simulated. Results are shown in figure 2.

Figure 2. Simulated Results of Analog Amplifier

The signal is then passed through Codec to be digitized. The processing of the digitized signal takes place in the processor. If the audio is to be recorded, the reception of processor is enabled and switch is closed to store the data in the memory. To restore the data, switch is again activated and the transmission port is enabled to pass the data to speaker drive through the Codec. Audio date can thus be stored in memory and retrieved when required. If the recording/playback is not taking place, the switch remains inactive. Block diagram of designed audio interface is shown in figure 3. I/P

Preamplifier Stage

Speaker Drive

CODEC Tx

O/P

Switch Processor

Memory

Rx

Figure 3. Audio Interface with Recording/Playing

2.2

Memory Interface

For storage of data, proposed hardware has 16MB of DRAM in a single 32-bit bank. Because of BiCMOS technology, memory consumes very low power and because of EDO mode, access time of memory is very small (60ns). To handle refreshing problem in DRAMs, self-refreshing facility has been used. Refresh period can be programmed into DRFPR register (DRAM refresh period register) of processor. Block diagram of DRAM interfaced with ARM720T is shown in the figure 4. For downloading the code, FLASH memory is provided. 8MB of 32 bytes wide FLASH is arranged in two banks.

2.3

RS 232 Interface

For handling different IO devices, various interfaces have been incorporated in the designed hardware so that communication and interfacing of processor with internal and external IOs can be done in a sophisticated way. External devices having outputs in RS232 format can be interfaced with the designed hardware through this interface. The same interface has been used for downloading code in FLASH of hardware. Processor takes CMOS logic levels. Whereas RS232 compatible external devices have logic levels of -15V (High) and +15V (Low). So, to provide compatibility in communication between processor and external devices, RS232 interface has been proposed in hardware. A shutdown facility that reduces the power consumption to 66nW is provided. While in shutdown, only one receiver remains active, thereby allowing monitoring of peripheral devices. This feature allows the device to be shut down until a peripheral device starts communication. The active receiver can alert the processor, which can then take the whole RS232 transceiver out of shutdown mode. The device will also go in shutdown mode if invalid RS232 voltage levels are present on the output. Block diagram of proposed RS 232 interface is shown in figure 5.

CAS [1-0]

LSW

D R A M

D15-D0

A27-A16

P S U

D31-D0

MSW

D R A M

ARM 720T

RAS0

MOE/MWE

D31-D16

CAS [3-2]

Figure 4. DRAM Interface FORCEOFF

Power Management Unit

INVALID

C P U

Parallel data

U A R T

Serial Data

RS232 Transceiver

Serial Data

ARM 720T

Figure 5. Transceiver Interface with Auto Power Shut Down Given an input pulse of amplitude +15V and -15V, RS 232 transceiver converts the voltage levels as shown in figure 6.

Figure 6. Simulated Waveform of RS232 Transceiver

2.4

Infrared Interface

For short distance communication upto 3m, IR interface is provided. UART1 of processor can be used for this purpose. IR interface consists of Photo PIN diode, an Infrared emitter and a low power analog control IC. IR interface with ARM 720T is shown in figure 7. IrDA

UART1 EPB Bus

UART2

LED and Photodiode

Async Interface 1

Async Interface 2

ARM 720T

Figure 7. IR Interface

2.5

LCD and Keyboard Interface

The hardware provides all the signals required to interface directly to a single scan monochrome LCD panel. 320 X 240 panel has been used. Since temperature extremes may affect the LCDs contrast, therefore data from temperature sensor has been employed to make temperature-stabilized display. The sensor should be placed in close proximity to the LCD. The stabilization circuitry simply consists of sensor, an op-amp and discrete components. Keyboard of 83 keys has been used.

2.6

Analog to Digital Converter

The analog to digital converter on the proposed hardware is a 10-bit, 8-channel converter. It connects to the ARM720T through its integrated SSI interface and performs conversions for the touch-screen interface, on-board voltage monitoring and an external analog input.

2.6.1

Digitizer Interface

The digitizer on the hardware is a simple four-wire version that allows for use of a two-plate resistive touch screen digitizer. Each terminal of x-plate and y-plate are connected to a transistor that allows the terminal to connect to a supply rail. This makes that each plate can be biased between 2.5V and 0V. A potential divider is formed when the user makes contact between the two plates by pressing on the screen. The output voltage is measured by ADC and is proportional to the position pressed. 2.6.2

Generic Channels Four channels of analog to digital converter are implemented as shown in

table 1. Table 1. Generic Analog to Digital Channels A/D Channel Function Description 0 General Purpose General purpose input Potentiometer Variable Resistance reading 0V 1 to 3.3V VDD Connected to VDD through 2 potential divider VREF Connected to VREF through 3 potential divider

2.7

PSU

A Switch Mode Power Supply has been designed to meet power requirements of proposed hardware. It takes 12V DC as input, converts it in 3.3V and 5V using Step down and step up voltage converters respectively. Block diagram of PSU is shown in Figure 8. VDD= 3.3V

12V Supply 3A Fuse

se

Step down DC-DC Converter

TVS

Figure 8. PSU

VCC=5V

Step up DC-DC Converter

DC input of 12V is given to power supply that gives regulated voltages of +3.3V and +5V as outputs. Simulated waveforms are shown in figure 9. These results show that Vdd = 3.3V Vcc = 5V

Figure 9. Simulated Waveform of PSU 3. ARM 720T ISC based embedded controller has been used to control the functionality of hardware. The core-logic functionality of the proposed hardware is built around an ARM720T processor having 8kbytes of four-way set-associative unified cache and a write buffer. Incorporated into the ARM720T is an enhanced memory management unit (MMU), which allows for Microsoft Windows CE support. It also includes a 32-bit Y2K-compliant Real Time Clock (RTC) and comparator. Simply adding desired memory and peripherals to the highly integrated ARM720T completes a low-power system solution. All necessary interface logic is integrated on-chip. 4. PCB Design and Simulation Multilayer PCB has been designed in PCAD2002 whereas SPECCTRA has been used for routing. PCB has been simulated for Xtalk and reflections. Results of X-talk simulation (shown in figure 10) shows that x-talk between any two signals also becomes nearly zero before 0.8s.

Figure 10. Crosstalk Analysis

Similarly reflection analysis (not shown here) shows that Xtalk becomes almost Zero in t = 0.7s. 5. Results and Conclusions We have proposed the Application Specific Integrated Circuits (ASIC) architecture and complete design implementation of hardware in this research work. The hardware consists of an embedded processor and a number of interfaces & IO devices to achieve required functionality. Hence, after coding the required algorithm, the hardware can be used to process text, audio and image date. The architecture satisfied the real-time constraints required by different signal processing applications. The design is useful in applications with speed and complexity constraints. Our design also satisfies low-power capability. Many applications such as organizers, PDAs, two-way pagers, digital cameras, smart cellular phones and industrial hand held information appliances require ultra low power to operate. So the proposed hardware can be optimized for these applications. The designed hardware is well suited for applications requiring long battery life while using standard AA/AAA batteries or rechargeable cells. Power consumption of different sections has been tabulated in Table 2. Table 2. Power Consumption of Different Interfaces

S. No.

Description

1

ARM 720T

2

RS232 Transceiver

3

Audio CODEC

4

Memory

5

Digitizer

Power Consumption • • • •

10uW in Standby State 50mW in Operating State 66nW in Auto Shutdown 40mW in Operating State

• • • • • • • •

3.6 mW in Power Save Mode 15mW in Operating State 660nW in Standby 23.1mW in Read Operation 49.5 mW in Program/Erase 3.3uW in Power-down Mode 178.2 uW for 1ksps Operation 3.6 mW for 133ksps Operation

6. References [1] Jamshaid Iqbal Bhatti, Uzma Mueen Butt, Kamil Hussain and Gulistan Raja, “ARM Solutions for Text, Audio and Image Data Processing for Ultra Low Power Applications,” 8th IEEE International Multitopic Conference (INMIC) 2004, pp. 32-35

[2] Tsugio Makimoto, Yoshio Sakai, “Evolution of low power electronics and its future applications”, IEEE International Symposium on Low Power Electronics and Design (ISLPED) 2003, pp. 2-5 [3] ARM website available online at http://www.arm.com/products/CPUs/ARM720T.html in Sep. 2005 [4] Bruce Carter, “A Single-Supply Op-Amp Circuit Collection”, Texas Instruments application report SLOA058, November 2000 available online at http://katalog.elektroda.net/indx475-SL.html in Sep. 2005

Suggest Documents