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Improved Three-Step De-Embedding Method to Accurately Account for the Influence of Pad Parasitics in Silicon On-Wafer RF Test-Structures Ewout P. Vandamme, Student Member, IEEE, Dominique M. M.-P. Schreurs, and Cees van Dinther
Abstract—In order to model the RF behavior of a device-under-test (DUT), e.g., active and passive devices, dedicated on-wafer test-structures are required. However, parasitic components in the test-structure stemming from the contact pads, the metal interconnections and the silicon substrate, largely influence the RF behavior of the actual DUT. They need to be subtracted from the measurement results if one wants to model the RF behavior of the actual DUT accurately. This subtraction procedure is referred to as de-embedding. In this paper, we propose an improved three-step de-embedding method to subtract the influence of parasitics. The de-embedding method has been applied not only to -parameter measurement results on MOSFETs but also, for the first time, to large-signal vectorial RF measurements. Index Terms—Integrated circuit modeling, microwave measurements, MOSFETs, nonlinear network measurement system (NNMS), scattering parameters measurement, semiconductor device measurements, semiconductor device modeling.
I. INTRODUCTION
D
ESIGNING RF circuits requires accurate models to describe the RF behavior of the devices used in the circuit. For example, to model the RF behavior of MOS transistors, compact models, like BSIM3v3 [1] and MM9 [2], or equivalent circuit-based models, like those proposed in [3], can be used. Their model parameters are extracted from -parameter measurements on dedicated on-wafer test-structures. These RF test-structures not only consist of the actual device-under-test (DUT) for which the model parameters need to be extracted, e.g., a MOSFET, a bipolar transistor, or a passive component, but also of parasitic components that largely influence the electrical behavior of the DUT. The parasitic components mainly originate from the contact pad, which connects the RF measurement probe and the silicon wafer, and from the metal interconnections between these contact pads and the DUT. In order to model the RF behavior of the DUT accurately, the influence of the parasitic components must be subtracted from the measureManuscript received February 21, 2000; revised August 18, 2000. The work of E. P. Vandamme was supported by IWT. The work of D. M. M.-P. Schreurs was supported by the FWO. The review of this paper was arranged by Editor G. Baccarani. E. P. Vandamme is with IMEC vzw, B-3001 Leuven, Belgium and also with the Katholieke Universiteit Leuven, ESAT-INSYS, B-3001 Heverlee, Belgium (e-mail:
[email protected]). D. M. M.-P. Schreurs is with the Katholieke Universiteit, Leuven, ESATTELEMIC, B-3001 Heverlee, Belgium. C. van Dinther is with Philips Semiconductors, 6534 AE Nijmegen, The Netherlands. Publisher Item Identifier S 0018-9383(01)02353-X.
ments on the test-structure. The procedure to correct for the influence of the on-wafer parasitic components is called de-embedding. After de-embedding, the correct , , or -parameters of the DUT are obtained. These parameters can then be used for example to extract RF model parameters. It should be noted here that, contrary to III–V technologies which are manufactured on isolating substrates, the parasitic components in silicon-based RF test-structures are very difficult to calculate accurately by electromagnetic simulations. Therefore, an on-wafer de-embedding technique for silicon-based technologies is mandatory. In their paper, Cho and Burk [4] already pointed out that the -parameter subtraction technique is not a sufficient de-embedding method, because the parasitic components in series with the DUT are not negligible. To de-embed the on-wafer parasitic components, they proposed a three-step de-embedding technique that requires four additional on-wafer de-embedding structures, namely, an open, a short1, a short2, and a through. Based on their analysis, we propose an improved three-step de-embedding technique. Our method proves to be more accurate at higher frequencies, which is important in view of the ever-increasing RF performance of silicon-based transistors and the corresponding model accuracy required at these high frequencies. Besides, we also show for the first time how to de-embed large-signal vectorial RF measurements. This paper is organized as follows. In the next section, we propose our modifications to the three-step de-embedding technique by Cho and Burk. We show how to de-embed the effect of parasitic contributions from -parameter measurements as well as from vectorial large-signal measurements. Section III discusses the main advantages of our improved three-step de-embedding technique compared to the method by Cho and Burk [4]. Small-signal and large-signal measurement results, that are de-embedded using our improved de-embedding method, are also shown and will be compared with modeling results.
II. DE-EMBEDDING PROCEDURE The layout of the RF test-structure and the corresponding on-wafer de-embedding structures, i.e., open, short1, short2, and through, are shown in Fig. 1(a) and (b). These additional structures are needed for the de-embedding procedure, as explained below. The layout of the pads and the metal interconnections is identical for the test-structure and the de-embedding
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and the actual DUT on the other. represents the ground leads toward the DUT. The purpose of the de-embedding technique is to calculate the values of the unknown parasitic components. This is accomplished by measuring the -parameters of the on-wafer de-embedding structures and converting them to -parameters using a and conversion table [6, p. 62]. For example, the parameters of the open structure are given by (1)
(2)
can be calculated as from which the value of . All parasitic admittance and impedance values can be calculated accordingly from the measured -paand of the open structure , of rameters , of the short1 structure, and the through structure of the short2 structure. They are given by (3) (4) (5) (6) Fig. 1. (a) Layout of the RF test-structure containing the DUT in the area enclosed by the dashed line. (b) Magnified view of the layout of the de-embedding structures. The pad layout and interconnection layout are equal to the test-structure. The shaded areas represent the metal.
structures. Our DUT consists of a 36-finger nMOS transistor with a total channel width of 144 m. Before applying the de-embedding procedure, measurements first must be calibrated up to the probe tip. For -parameter measurements this is done using an LRM calibration procedure on an ISS calibration substrate, provided by the probe manufacturer. Vectorial large-signal RF measurements are calibrated using the procedure described in [5]. A. Calculation of Parasitic Elements The basic assumption in the de-embedding procedure by Cho and Burk [4], and thus also in our method, is that the RF teststructure and the corresponding de-embedding structures can be represented schematically by the circuits shown in Fig. 2(a) and (b), respectively. The electrical behavior of the DUT is influand the parenced by the parasitic admittances , , and asitic impedances , , and . The admittances , , and represent the coupling via the metal interconnections and the silicon substrate between the pads of gate ( port1) and source, drain ( port2) and source, and gate and drain, respectively. and originate from the metal interconnections series impedances between port 1 and port 2, respectively, on the one hand
(7) (8) As pointed out in [4], it can be useful to extract an equivalent circuit for these parasitic elements. For example, this greatly simplifies the model implementation of the complete test-structure, i.e., DUT and parasitic elements, in a SPICE-like circuit simulator. Then also the behavior of the complete test-structure could be easily analyzed at frequencies outside the measurement frequency range. Nevertheless, for the purpose of de-embedding the measurement results and subsequent modeling of the DUT itself, which is the focus of this paper, the extraction of an equivalent circuit for the parasitic elements is not required as such. B. Model Assumptions and Improvements Compared to the Original Three-Step De-Embedding Method In the derivation of (6)–(8) we assumed that (9) . Our measurements indicate that the ratio decreases with frequency, but it is always larger than 60 in the measured frequency range. Equation (9) can be used to check the validity of the de-embedding method. Another assumption is that the contact impedance is identical
with
or
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Fig. 3. (a) De-embedding procedure for S -parameter measurements. (b) De-embedding procedure for large-signal vectorial RF measurements.
Fig. 2. (a) Equivalent circuit of the RF test-structure. The DUT in this paper is a MOS transistor. This circuit represents the actual layout of the complete RF test-structure, as shown in Fig. 1(a). (b) Equivalent circuits of the open, short1, short2, and through de-embedding structures.
every time a contact is made with an RF probe to an on-wafer structure. Like process variations, this will introduce additional errors in the de-embedded values for the , , or -parameters of the DUT, but this is inherent to an on-wafer de-embedding technique. The differences between (3)–(8) and the corresponding equaup to , are due to tions in [4] to calculate the values of following assumptions in [4], which are not made in this paper: and are neglected in the open • series impedances structure; and series impedance are ne• parallel admittance glected in the short1 structure; and series impedance are ne• parallel admittance glected in the short2 structure. The first assumption in Cho’s method [4] overestimates the coupling between port 1 and 2, especially at very high frequencies. As we will show by measurement results in Section III, the combined effect of these assumptions introduces large errors at high in the expressions frequencies. Furthermore, the sign of is wrong. by Cho [4] to calculate , , and Both our approach and the approach by Cho and Burk assume that the impedance of the metal interconnect to make the or . In genthrough structure is negligible compared to eral, this assumption is valid only if the area occupied by the DUT is much smaller than the distance between the probe pads of port1 and port2. In our case, this assumption is valid, but this is not necessarily true for example for large spiral inductors. The de-embedding then overestimates the contribution of and .
It should be noted that in total 16 -parameters are available to calculate six unknown components. However, not all -parameters can be used. The coupling between port 1 and 2 in the short1 structure, for example, is very small. That is, using in the de-embedding procedure would result in large errors in the , and -parameters of the DUT. The measured -parameters up to and that are that are not used in the calculations of large enough in magnitude can be used to verify the validity of and the de-embedding procedure. For that purpose are used, as will be shown in Section III. It is also possible to calculate the unknown parasitic compo. These calculanents without assuming tions are not included in this paper, because they result in very long equations and do not provide additional information. Besides, we observed no significant difference between these calculations and (6)–(8), because the condition in (9) is satisfied up to 50 GHz. C. De-Embedding of -Parameters up to are known, the meaNow that the values for sured -parameters can be de-embedded. This is done in three consecutive steps, as shown in Fig. 3(a). First, the measured -parameters of the RF test-structure are converted to -parameters [6, p. 62]. The resulting -parameter is then corrected for the influence of admittances matrix and (10) is converted to a Subsequently, the -parameter matrix -parameter matrix, and the series impedances can be accounted for using (11)
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The resulting -parameter matrix is converted back to a -parameter matrix . Finally, the coupling between port 1 and 2 is de-embedded, which results in the -parameter matrix of the DUT (12) can be converted into -, -, or -parameters if needed. D. De-Embedding of Vectorial Large-Signal Measurements Generally, de-embedding is associated with -parameter measurements and also well known in literature. However, no information is found on how to de-embed on-wafer large-signal (nonlinear) vectorial RF measurements. In fact, as we will show here, de-embedding this type of measurements is substantially different from -parameter de-embedding. Large-signal vectorial RF measurements and subsequent modeling are, for example, very important in the design of mixers and power amplifiers. These measurements can be performed using the nonlinear network measurement system (NNMS) [5]. The NNMS offers the unique capability to measure, at the input and output of any two-port device under test, both phase and amplitude of voltages and currents in frequency domain and corresponding waveforms in time domain. This large-signal information then represents, under the given stimulus, the entire MOSFET RF behavior. The (large-signal) currents and voltages that occur in the teststructure, shown in Fig. 3(b), are defined in frequency domain, because the parasitic elements are defined in frequency domain as well. Then, in order to model the large-signal RF behavior and , and voltages at the level of the DUT, currents and are of interest. They can be calculated using following equations: (13) (14) (15) (16) where ; ; ; . The currents , , and voltages , , are the measured quantities provided by the NNMS. Time domain behavior of the DUT can then easily be obtained using inverse Fourier transform, because the NNMS provides all the necessary data, i.e., information on both amplitude and phase. Nonlinear measurement results, using this de-embedding technique, are shown in the next section. III. MEASUREMENT RESULTS AND DISCUSSION In this section, we first compare our de-embedding method with the de-embedding method by Cho and Burk. The latter introduces significant errors at high frequencies as will be
Fig. 4. Current gain with short-circuited output jh j (lower frequency-scale) and maximum unilateral transducer power gain G (upper frequency-scale) versus frequency. The symbols denote the resulting gains after de-embedding with our improved method. The dashed line represents the measured jh j, thus without de-embedding at all. The solid lines denote the resulting gains after de-embedding using Cho’s method [4]. V (dc) = V (dc) = 1:2 V.
shown by measurement results on a MOS transistor. Secondly, the de-embedding method itself is verified using measured -parameters of the de-embedding structures that are not used up to . Finally, we apply our in the calculations for improved method to de-embed -parameter measurements and vectorial large-signal measurements and compare these results with an equivalent circuit-based model. A. Comparison of Our De-Embedding Method with Cho’s Method An important aspect in circuit design is to determine which transistor type or which technology generation is needed to achieve the specified targets of the circuit. For that purpose, are helpful to compare the RF figures-of-merit like and performance of different transistors [7]. Fig. 4 shows the gain curves of a MOSFET that are needed for the extraction of and . The importance of an accurate de-embedding method becomes clear from the frequency dependence of the measured , i.e., as obtained directly from -parameter measurements thus without de-embedding applied. This curve does not show a slope inversely proportional to frequency at low frequencies, as would be expected theoretically for a MOS transistor [8]. After de-embedding, the correct slope is obtained. The difference between our de-embedding method and Cho’s method appears at high frequencies, where an abrupt (nonphysical) decrease in current gain is observed for frequencies above 30 GHz. Besides, versus frequency in Cho’s method [4] the gain curve shows a leveling-off to a plateau value at high frequencies. This would mean that the power delivered to the load remains constant as frequency increases and that the transistor still works as an amplifier, even at extremely high frequencies. Of course, this is not physical and only a result of the assumptions made in Cho’s de-embedding method. versus frequency for Fig. 5 shows the stability parameter our improved de-embedding method and for the method by Cho
VANDAMME et al.: IMPROVED THREE-STEP DE-EMBEDDING METHOD
Fig. 5. Stability parameter K of the MOS transistor, calculated from the measured S -parameters after de-embedding with our improved method. The stability parameter decreases again for very large frequencies for the three-step de-embedding method by Cho and Burk [4], which is nonphysical. V (dc) = V (dc) = 1:2 V.
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Fig. 7. Measured and modeled small-signal y -parameters of a MOSFET after applying the improved de-embedding method on the measured S -parameters. (dc) = V (dc) = 1:2 V. y is represented by , y by +, V y by and y by .
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erties of the silicon substrate. Therefore, the best possible verification is to use the measurement results of those -parameters from the de-embedding structures that are not used in (3)–(8) up to . These -parameters are to calculate values for then compared with their theoretically calculated value from the equivalent circuit in Fig. 2(b). This comparison, presented in and , shows that both Fig. 6 for and are modeled accurately up to 50 GHz. This analysis also indicates that the layout of the de-embedding structures is correctly represented by the equivalent circuits in Fig. 2(b). show large deviations, but this Modeled and measured is because the measured -parameters are below the noise floor, . especially Fig. 6. Measured (solid line) and modeled (symbols) y -parameters of the de-embedding structures to check the validity of the de-embedding procedure. Modeling results are obtained using the equivalent circuit of the de-embedding structures, shown in Fig. 2, and the calculated values for G up to Z , (3)–(8).
and Burk. For (and ), the MOS transistor is unconditionally stable and any passive load or source in the network produces a stable condition, i.e., no oscillations can occur [6]. Thus is a very important parameter decreases again around in circuit design. Fig. 5 shows that 30 GHz for Cho’s method, whereas in our method, increases monotonically with frequency as expected theoretically. B. Validation of De-Embedding Procedure To verify the validity of the de-embedding method, independent measurements or modeling results are required. However, to date, no commercially available software program can calculate the complete electromagnetic behavior of an RF test-structure up to 50 GHz, taking into account the complexity of the three-dimensional doping profiles, the layout of the test-structure, the various intermetal dielectric oxide layers and the prop-
C. Application of the Improved De-Embedding Method to Small-Signal and Large-Signal Measurements In Fig. 7 we applied our de-embedding method to measured -parameters of a MOS transistor. The small-signal modeling results were obtained using an equivalent circuit, similar to the one proposed by Tsividis [9]. Both the absolute value and the phase of the -parameters are accurately modeled up to 50 GHz. This is of course no direct proof on the accuracy of the de-embedding method itself, but it indicates the usefulness of the de-embedding method and the equivalent circuit model. As pointed out before, de-embedding of large-signal RF measurements (e.g., using the NNMS) is substantially different from -parameter measurements. The resulting time-domain waveform of the drain current at the level of the DUT for a two-tone measurement is shown for example in Fig. 8. These type of measurements are important for example for mixer design. The large-signal model is based on a look-up table, in a way similar to what has been done for heterojunction FETs [10], but adapted for MOSFETs. Again, good agreement between measurements and modeling is obtained. Note that very similar results would up to if they were have been obtained using the values of
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Fig. 8. Nonlinear two-tone measurement (symbols) and modeling result (line), showing drain current versus time. The large-signal de-embedding procedure, described in Section II-D, is used to obtain the drain current at the level of the DUT. Two sinusoidal waveforms are applied at the gate and drain terminals simultaneously, with frequencies of 3 and 3.6 GHz, respectively. V (dc) = 0:9 V, V (dc) = 1:2 V.
extracted using Cho’s method. This is related to the limited frequency range (20 GHz) of the present RF large-signal measurement equipment. Nevertheless, because no information is found in literature about the de-embedding of large-signal vectorial RF measurements, the aim here is to show how these measurements can be de-embedded up to the level of the DUT. IV. CONCLUSIONS We proposed an improved de-embedding method to accurately account for the influence of pad parasitics in silicon RF test-structures. Our method proves to be more accurate at high frequencies than the existing three-step de-embedding method. We successfully applied our method to -parameter measurements and, for the first time, to vectorial large-signal RF measurements. REFERENCES [1] W. Liu, R. Gharpurey, M. Chang, U. Erdogan, R. Aggarwal, and J. Mattia, “R. F. MOSFET modeling accounting for distributed substrate and channel resistances with emphasis on the BSIM3v3 SPICE model,” in IEDM Tech. Dig., 1997, pp. 309–312. [2] R. Vanoppen, J. Geelen, and D. Klaassen, “The high-frequency analogue performance of MOSFETs,” in IEDM Tech. Dig., 1994, pp. 173–176. [3] C. Biber, M. Schmatz, T. Morf, U. Lott, and W. Bachtöld, “A nonlinear microwave MOSFET model for spice simulators,” IEEE Trans. Microwave Theory Tech., vol. 46, no. 5, pp. 604–610, 1998. [4] H. Cho and D. Burk, “A three step method for the de-embedding of high frequency S -parameter measurements,” IEEE Trans. Electron Devices, vol. 38, no. 6, pp. 1371–1375, 1991.
[5] J. Verspecht, P. Debie, A. Barel, and L. Martens, “Accurate on wafer measurement of phase and amplitude of the spectral components of incident and scattered voltage waves at the signal port of a nonlinear microwave device,” in MTT-S Int. Microwave Symp. Dig., 1995, pp. 1029–1032. [6] G. Gonzalez, Microwave Transistor Amplifiers. Analysis and Design. Englewood Cliffs, NJ: Prentice-Hall, 1997. [7] E. Vandamme, D. Schreurs, B. Nauwelaers, C. van Dinther, G. Badenes, and L. Deferm, “Reliable extraction of RF figures-of-merit for MOSFETs,” in Proc. 29th Eur. Solid-State Device Res. Conf. ESSDERC’99. Leuven, Belgium, 1999, pp. 660–663. [8] K. Laker and W. Sansen, Design of analog integrated circuits and systems. New York: McGraw-Hill, 1994. [9] Y. Tsividis, Operation and modeling of the MOS transistor, 2nd ed. New York: McGraw-Hill, 1999. [10] P. Jansen, D. Schreurs, W. De Raedt, B. Nauwelaers, and M. Van Rossum, “Consistent small-signal and large-signal extraction techniques for heterojunction FET’s,” IEEE Trans. Microwave Theory Tech., vol. 43, no. 1, pp. 87–93, 1995.
Ewout P. Vandamme (S’93) was born in Eindhoven, The Netherlands, in 1972. He received the M.Sc. degree in electrical engineering from the Eindhoven University of Technology in 1994 and the M.Sc. degree in physics of microelectronics and materials science from the Katholieke Universiteit (K.U.) Leuven, Belgium, in 1995. He is currently a Ph.D. candidate at K.U. Leuven, where he is involved in CMOS technology development and modeling. This work is performed in collaboration with the interuniversity microelectronics research center, IMEC, Belgium. His current research interests are in the modeling of the low-frequency noise and small-signal as well as large-signal RF behavior of MOSFETs.
Dominique M. M.-P. Schreurs received the M.Sc. degree in electronic engineering and the Ph.D. degree (with honors) from the Katholieke Universiteit (K.U.) Leuven, Belgium, in 1992 and 1997, respectively. She is currently a Postdoctoral Fellow of the Fund for Scientific Research-Flanders and an Assistant Professor at the K. U. Leuven. Her main research interest is the use of vectorial large-signal measurements for the characterization and modeling of nonlinear microwave devices.
Cees van Dinther studied electrical engineering with an emphasis on telecommunication at the Technical University of Eindhoven, Eindhoven, The Netherlands, and received the M.Sc. degree in 1999. In 1999, he joined Philips Semiconductors, where he has been working on the development of MMICs. Low-noise amplifiers and VCOs are his main field of work, in silicon and recently also in SiGe. His activities include technology characterization, modeling, designing, and testing.
