PEDS2009
Optimal Pulsewidth Modulation of Nine-Switch Inverter Feng Gao, Lei Zhang, Ding Li, Poh Chiang Loh and Yi Tang School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore
[email protected] two bridges configuration with total twelve switches as shown in Fig. 1, the nine-switch inverter shown in Fig. 2 can save three switches easily fulfilling the practical concern of cost reduction. In addition to the dual-motor driving application, the nine-switch inverter can also be controlled as a three-phase three-leg ac-ac converter as reported in [8, 9], where specifically the nine-switch inverter can be used as either a
Abstract—This paper presents the optimal pulsewidth modulation (PWM) schemes suitable for controlling a nineswitch inverter. Modulation wise, references with smallest offsets added are preferred for common frequency in-phase operation because of its lowest influence in harmonic performance. But for the common frequency operation with phase shift needed, traditional zero sequence harmonic offset cannot increase the total maximum modulation depth available in nine-switch inverter. For both common and variable frequency operations, a combined maximum and minimum 120˚ discontinuous PWM (DPWM) is proposed as the most efficient modulation scheme due to its unique and significant capability in reducing commutation counts among various DPWM schemes. Simulation and experimental results are presented to verify the proposed theories. Keywords—Nine-switch inverter; voltage source inverter; pulsewidth modulation.
I.
INTRODUCTION
The development trend of modern power electronics is to some extend to pursue the low cost, less components, high efficiency and high reliability solutions. To address these concerns in motor drive applications, several componentminimized topologies have been proposed, such as the twolevel and three-level indirect matrix converters [1, 2] which eliminate the bulky electrolytic dc-link capacitors with the benefits of increasing converter life time and reducing system size. Another pursuance of reducing semiconductors is represented by (e.g.) B4 inverter [3] and five-leg inverter [4]. The former eliminates one phase-leg switches by reconfiguring the third phase to the middle point of split dclink capacitors and the latter is normally designed for powering two independent three-phase motors by assuming the fifth phase leg as common phase leg to which one phase from each motor connects. To drive multiple motors, the B4 inverter can also be extended to the dual configuration as reported in [5] for an electric vehicle traction application. When dual B4 inverter or five-leg inverter driving three-phase motors, both suffer the limitation of reduced modulation depth as the tradeoff for using less active components, which at times is still acceptable in applications where small system size and low cost are the major concerns.
Fig. 1: Two bridges configuration with twelve switches for powering two motors.
Besides the dual B4 inverter and five-leg inverter, a new semiconductor-minimized topology initially designed for driving two independent motors named as nine-switch inverter was recently developed [6, 7]. Comparing to the traditional
Fig. 2: Nine-switch inverter configuration.
718
PEDS2009 uninterruptable power supply (UPS) with the same fundamental frequency between input and output voltages referring to the common frequency (CF) operation mode or an adjustable ac drive with fixed input frequency and amplitude from ac mains and variable output frequency and amplitude fed to a controlled motor referring to variable frequency (VF) operation mode. Unlike the topology shown in Fig. 1 whose dc input supply can also be replaced by a dc-link capacitor forming a traditional back-to-back ac/ac conversion without unwanted interference between the modulation depth of input and output, the nine-switch inverter however faces the problem of functional coupling of middle semiconductors similar as the five-leg inverter. Therefore, the resulted total modulation index of control variables in nine-switch inverter has a specific limitation depending on the particular operation requirements. Regardless of the specific applications, the modulation references in the vertical span of sine-carrier modulation scheme are always arranged that the set of references for modulating upper outputs (or inputs from ac mains) must be higher than those for modulating lower outputs even in the CF operation. In spite of the nine-switch inverter can save semiconductors obviously, its commutation counts are however still equal to the twelve-switch configuration when operated under the same switching frequency for both topologies in Fig. 1 and 2. Therefore, the nine-switch inverter with the reported modulation schemes like the sine-triangle modulation, space vector modulation documented in [6-9] cannot increase the inverter efficiency significantly. Aiming to explore the operational principles unrevealed and reduce switching losses, this paper therefore investigates the optimal pulsewidth modulation schemes suitable for controlling a nine-switch inverter.
Fig. 3: Exampled switching states when operating in CF mode with two references in phase.
avoiding the destructive state SX = SXY = SY = 1 generated [6]. To easily identify switching states of nine-switch inverter, {1}, {0} and {-1} are respectively assigned to represent the viable three commutation combinations per phase as indicated in Fig. 3. In particular, {1} refers to the combination of (1, 1, 0) created by turning ON (e.g.) SA and SAU and {-1} refers to (0, 1, 1) with (e.g.) SAU and SU being ON. (1, 0, 1) is then assigned to the abbreviated form of {0}. Other combinations can be automatically avoided simply through the XOR logic operation adopted except of (0, 0, 0), which can only be created when reference Y locates above reference X at any instant in Fig. 3. State combination (0, 0, 0) can unfavorably distort normalized output volt-sec average in three phase system because of the uncontrolled dc-link clamping, which then unfortunately causes the well-known harmonic superior PWM scheme with centralized placement of active interval in each switching period unsuitable in nine-switch inverter modulation. Obviously, the total modulation depth of nineswitch inverter is also restricted. Details of modulation principle of nine-switch inverter for CF and VF operations will be presented below.
This paper first presents the general operational principles and modulation schemes of nine-switch inverter valid for any operation mode in Section II. Then the appropriate continuous PWM schemes are developed for both operation modes in Section III. By comparing various DPWM schemes, the combined maximum and minimum 120˚ discontinuous PWM is explored in detail in Section IV. Finally, Matlab\PLECS simulations are carried out to validate the performance of nine-switch inverter before using the constructed laboratory prototype to capture experimental results for visual confirmation.
III. CONTINUOUS PULSESWIDTH MODULATION OF NINESWITCH INVERTER
II. GENERAL MODULATION PRINCIPLE OF NINE-SWITCH INVERTER
A. Common Frequency Operation When the dual motors driving electric vehicle (EV) operates in straight-line regime [5] or the ac-ac converter works as an online UPS [9], both sets of modulation references in nine-switch inverter can be produced with the equal fundamental frequency, for example 50 Hz input voltage from ac mains and 50 Hz output voltage to critical load in case of the normal operation of online UPS. Despite that two sets of references can have acceptable phase shift between them according to their corresponding amplitude [9], but their inphase displacement in EV can also be easily achieved by adding a compensation angle to achieve maximum modulation
Referring to Fig. 2, the switches SXY (XY = AU, BV or CW) can be treated as the combination of switches SX’ (X = A, B or C) and SY’ (Y = U, V or W) in Fig. 1. The rest in Fig. 2 (SX and SY) would remain their switching action (1 or 0) unchanged when two sets of sinusoidal references are assumed to generate the corresponding commutations for each fullbridge inverter in Fig. 1, respectively, as the exampled switching states shown in Fig. 3, where the switching status of middle switch SXY is produced by using the logic operation of XOR between SX’ and SY’. Dong so, the dead time protection will be automatically inserted into each phase-leg
719
PEDS2009 depth. Doing so, both modulation amplitudes can reach unity meanwhile keeping the optimal harmonic performance without affecting the operation of dual motors. At this extreme condition, the nine-switch inverter indeed operates like single full-bridge inverter equally powering two independent loads. In general, the modulation signals can be written as:
⎧VA (t ) = M 1 sin(ω1t + ϕ1 ) + Voffset1 ⎪ ⎨VB (t ) = M 1 sin(ω1t + ϕ1 − 2π 3) + Voffset1 ⎪ ⎩VA (t ) = M 1 sin(ω1t + ϕ1 + 2π 3) + Voffset1 ⎧VU (t ) = M 2 sin(ω2 t + ϕ2 ) + Voffset 2 ⎪ ⎨VV (t ) = M 2 sin(ω2 t + ϕ2 − 2π 3) + Voffset 2 ⎪ ⎩VW (t ) = M 2 sin(ω2 t + ϕ2 + 2π 3) + Voffset 2
(1)
(2) Fig. 4: Optimal placement of references under out of phase CF mode.
In case of CF in phase operation, ω1 = ω2 and phase θ = φ1 – φ2 = 0, if M1 > M2, Voffset1 can be zero or triplen harmonic offset but without dc value added to shift references. Instead, to maintain correct operation, a dc offset of (M2 – M1) should be added into Voffset2 to shift second set of references as illustrated in Fig. 3. And verse visa for case where M1 < M2, only Voffset1 would include the dc offset of (M2 – M1). Doing so, one set of references will centers in the vertical span to produce the optimal harmonic performance and another set will generate the lowest possible harmonic spectrum. On the other hand, in the case of CF mode with out of phase operation, the operational limitation is that VX always being higher than VY with respect to the same phase operation. Then equation (3) describes this operational limitation.
M 1 sin(ωt + θ ) + 1 − M 1 ≥ M 2 sin ω t + M 2 − 1
(3)
Once (e.g.) M1 and θ are set, M2 can be derived as: M2 ≤
2 + M 1 (sin(ω t + θ ) − 1) 1 + sin ω t
(4)
Fig. 5: Exampled switching sequence of nine-switch inverter under in phase common frequency operation.
Then the maximum M2 can be determined by differentiating (4) to calculate the specific value of ωt under extreme value condition.
total modulation index is less than the maximum value, where Ref X locates in the center of vertical span and Ref Y is just shifted downwards to close Ref X. Doing so, the harmonic performance of upper output would be superior. But of course, the specific arrangement between two references depends on the phase shift angle and output requirements.
In particular, a simpler and more straightforward method can be assumed in CF out of phase operation, where M1 = M2 = M, then from (3),
M≤
2
θ
2ωt + θ 2 − 2 sin cos 2 2
To assist in understanding the whole operation of CF mode, an example switching sequence of nine-switch inverter is illustrated in Fig. 5, where two absolute null state {-1, -1, -1} and {1, 1, 1} appear at the beginning and end of each half carrier cycle. The extreme condition of CF mode is the 180˚ phase shift according to (5), in which the sum of modulation depths cannot exceed unity in order to avoid the unexpected (0, 0, 0) state appeared in a phase leg, which also implies the operational principle of variable frequency mode as stated below.
(5)
Comparing (3) and (5), it is noted that the maximum total modulation index occurs only when M1 = M2 implying full utilization of inverter ratings. And from (5), it is observed that the maximum M is only determined by phase shift angle θ since cos((2ωt+θ)/2) are always assumed to be -1. Furthermore, the zero sequence offset indeed cannot increase modulation index in CF out of phase operation, which can be simply explained by considering (3) and (5) where the same offset would be eliminated when calculating M. Fig. 4 shows a possible arrangement between two sets of references when
B. Variable Frequency Operation In applications of ac-ac conversion for driving variable speed ac motor, dual output operation for centre-driven winder
720
PEDS2009 or dual motor drived electric vehicle running in turning regime, two sets of references of nine-switch inverter will equip with differently fundamental frequencies. Then ω1 ≠ ω2 in (1) and (2), meanwhile M1 + M2 ≤ 1.15 because the triplen harmonic offset can be added to increase modulation ratio resembling the extreme condition of θ = 180˚ in (5). Detailed switching example is illustrated in Fig. 6, where the switching signals of SX represent the upper switching states and in contrast, switching signals of SY reflect the individual two-level modulation of lower output. The original null state (1, 1, 1) of SX (SY) occupies four equivalent switching intervals from {-1, -1, -1} ({0, 0, 0}) to {0, 0, 0} ({1, 1, 1}) resulting in the inferior harmonic performance comparing to the vertically centralized CF modulation as a necessary tradeoff between modulation flexibility and component count assumed. In summary, the combined equivalent sequences then first performs the upper output modulation with the lower output modulation followed to fully make use of modulation capability. Fig. 6: Exampled switching sequence of nine-switch inverter under variable frequency operation.
Even working well, the VF modulation with purely sinusoidal modulation still produces the same commutation counts as the traditional two-bridge inverter. Due to the special requirement of nine-switch inverter modulation as stated above, a harmonic improved scheme is hard to develop for VF operation mode. Therefore, a superior modulation scheme that can reduce commutation counts meanwhile would not increase harmonics should be explored as addressed in next section.
(a)
IV. DISCONTINUOUS PWM SCHEME OF NINE-SWITCH INVERTER Observing Fig. 5 and 6, total 12 commutations occur in half switching period the same as that generated by the twobridge configuration in Fig. 1. The two-bridge configuration however can use the well-established discontinuous PWM schemes to reduce commutation count. Discontinuous PWM schemes have been proved their validation and advantages in traditional two-level and multilevel inverters [10-14]. But their implementation in the novel nine-switch inverter is not straightforward. Among the popular DPWM schemes, 30˚ and 60˚ DPWM schemes indeed cannot be applied in nine-switch inverter because the overlapping generated between upper and lower references does not obey the general operational principle stated in Section II. Fig. 7(a) and (b) graphically illustrate the characteristics of 60˚ and 30˚ DPWM in CF inphase operation mode with M1 = 1.15 and M2 = 8.05, respectively. Quite intuitively, both DPWM schemes cannot properly arrange upper and lower modulating references even under CF in-phase operation mode mainly because modulating signal is balanced in the whole vertical span and the upper and lower dc clamping is fixed. Then other viable DPWM schemes should be explored to achieve the purpose of reducing commutation count. Now analyzing the unbalanced 120˚ DPWM schemes which can be classified as either DPWMMAX or DPWMMIN referring to upper dc clamping or lower dc clamping respectively reveals that single type of 120˚ DPWM cannot be solely used for controlling nine-switch inverter except of the condition of CF in-phase operation since any phase shift would cause modulation error. But further exploring the characteristics of DPWMMAX and DPWMMIN
(b) Fig. 7: Graphical illustration of CF in-phase modulating signals with M1 = 1×1.15 and M2 = 0.8×1.15 for (a) 60˚ and (b) 30˚ DPWM in nine-switch inverter modulation.
(a)
(b) Fig. 8: 120˚ DPWM single phase reference arrangement of nine-switch inverter for (a) CF and (b) VF operation.
721
PEDS2009 demonstrates that their combination can be assumed to freely control nine-switch inverter as continuous PWM schemes. Its operational principles for CF and VF modes are then presented below, respectively. A. Common Frequency Modulation Briefing in this subsection, the combined 120˚ DPWM for CF modulation is illustrated in Fig. 8(a), where the upper reference always locates above the lower reference by using the maximum and minimum DPWM for reference X and Y respectively. The CF operation with either in phase or out of phase displacement can then easily achieve least commutation count. In total, 33% commutation counts are saved per fundamental cycle. Similarly, when phase-shift needed, the modulation index should be adjusted accordingly as presented in Section III(A) but with the DPWM references always clamping to top or bottom. The finding for maximum modulation depth of out of phase operation in Section III(A) is equally applicable here implying that DPWM in nine-switch inverter can only reduce commutation count without the capability of increasing modulation depth.
Fig. 9: Simulated waveforms under CF in-phase operation.
B. Variable Frequency Modulation Similarly, the combined DPWM can be used in variable frequency modulation. Unlike the modulation schemes stated in Section III(b) where dc offsets are necessary to shift the sinusoidal references, the maximum and minimum DPWM assumed here can naturally avoid their intersection by just simply keeping their total modulation peak not larger than unity as shown in Fig. 8(b). V. SIMULATION AND EXPERIMENTAL VERIFICATION
Fig. 10: Simulated waveforms under CF 30˚ phase shift operation.
The proposed modulation schemes of nine-switch inverter were first verified in Matlab\PLECS simulations using independent dual outputs. The common dc input is tuned to be 200V powering two same RL loads with R = 30 Ω and the common triangular carrier has the switching frequency of 10k Hz. The modulation depths of upper and lower references are set to be 1×1.15 and 0.7×1.15 respectively for in-phase common frequency operation, where the max and min DPWM are assumed to control each output with the performance shown in Fig. 9. Obviously, the first and second traces show the 120˚ discontinuous phase voltages of upper and lower outputs as anticipated and the around 6.5A amplitude of line current implicitly reflects that the total output voltage exceeds the maximum available output by using the same dc-link voltage in conventional two-level VSI. Next, Fig. 10 shows the simulated waveforms of CF out of phase operation with M1 = M2 = 0.79 and θ = 30˚ using the proposed max and min DPWM schemes for upper and lower outputs, respectively. Then for verifying VF operation, Fig. 11 shows the simulation results with M1 = M2 = 0.5×1.15 and ω1 = 100π, ω2 = 60 π, where the same amplitude of line currents are produced.
Fig. 11: Simulated waveforms under VF operation.
voltage illustrated, significant reduction of commutation count is achieved. VI. CONCLUSION
Next proceeding to experimental verifications, Fig. 12, 13 and 14 show the captured experimental results under the same operation conditions as simulation results of Fig. 9, 10 and 11, respectively. Quite similarly, experimental results demonstrate the good performance of nine-switch inverter under various operation conditions. Especially with the discontinuous phase
This paper presents the optimal pulsewidth modulation schemes suitable for controlling nine-switch inverter. In principle, the upper modulation signals must be higher than the lower modulation signals at any instant when using sinetriangle modulation technique. Modulation wise, references with smallest offsets added are, therefore, preferred to use in
722
PEDS2009 120˚ DPWM is the most suitable choice due to its unique discontinuous PWM capability in maintaining normalized volt-sec average of dual outputs. The combined DPWM scheme can also be treated as the preferred modulation method for variable frequency operation of nine-switch inverter. Simulation and experimental results are presented to verify the proposed modulation theories. ACKNOWLEDGEMENT This paper is financially supported by Agency for Science, Technology and Research (A*STAR), Singapore. REFERENCE [1]
Fig. 12: Exampled experimental waveforms under CF in-phase operation.
[2] [3]
[4]
[5] [6] Fig. 13: Exampled experimental waveforms under CF 30˚ phase shift operation.
[7] [8] [9] [10] [11]
[12] Fig. 14: Exampled experimental waveforms under VF operation.
[13]
common frequency operation because of its lowest influence in harmonic performance. To reduce commutation count in nine-switch inverter, a combined maximum and minimum
[14]
723
J. W. Kolar, F. Schafmeister, S. D. Round and H. Ertl, “Novel threeahase AC–AC sparse matrix converters,” IEEE Trans. Power Electron., vol. 22, no. 5, pp. 1649-1661, Sep. 2007. P. C. Loh, F. Blaabjerg, F. Gao, A. Baby and D. A. C. Tan, “Pulsewidth modulation of neutral-point-clamped indirect matrix converter,” IEEE Trans. Ind. Appl., vol. 44, no. 6, pp. 1805-1814, Nov./Dec. 2008. F. Blaabjerg, S. Freysson, H. H. Hansen and S. Hansen, “A new optimized space-vector modulation strategy for a component-minimized voltage source inverter,” IEEE Trans. Power Electron., vol. 12, no. 4, pp. 704-714, Jul. 1997. M. Jones, S. N. Vukosavic, D. Dujic, E. Levi and P. Wright, “Five-leg inverter PWM technique for reduced switch count two-motor constant power applications,” IET Electr. Power Appl., vol. 2, no. 5, pp. 275-287, Sep. 2008. E. Ledezma, B. McGrath, A. Munoz and T. A. Lipo, “Dual AC-drive system with a reduced switch count,” IEEE Trans. Ind. Appl., vol. 37, no. 5, pp. 1325-1333, Sep./Oct. 2001. T. Kominami and Y. Fujimoto, “A novel nine-switch inverter for independent control of two three-phase loads,” in Proc. IEEE-IAS’07, 2007, pp. 2346-2350. T. Kominami and Y. Fujimoto, “Inverter with reduced switching-device count for independent AC motor control,” in Proc. IEEE-IECON’07, 2007, pp. 1559-1564. C. Liu, B. Wu, N. R. Zargari, D. Xu and J. R. Wang, “A novel threephase three-leg AC/AC converter using nine IGBTs,” IEEE Trans. Power Electron., vol. 24, no. 5, pp. 1151-1160, May 2009. C. Liu, B. Wu, N. R. Zargari and D. Xu, “A novel nine-switch PWM rectifier-inverter topology for three-phase UPS applications,” in Proc. IEEE-EPE’07, 2007, pp. 1-10. A. M. Hava, R. J. Kerkman and T. A. Lipo, “A high-performance generalized discontinuous PWM algorithm,” IEEE Trans. Ind. Appl., vol. 34, no. 5, pp. 1059-1071, Sep./Oct. 1998. G. Narayanan, H. K. Krishnamurthy, D. Zhao and R. Ayyanar, “Advanced bus-clamping PWM techniques based on space vector approach,” IEEE Trans. Power Electron., vol.21, no. 4, pp. 974-984, Jul. 2006. O. Ojo, “The generalized discontinuous PWM scheme for three-phase voltage source inverters,” IEEE Trans. Ind. Electron., vol. 51, no. 6, pp. 1280-1289, Dec. 2004. P. C. Loh, G. H. H. Pang and D. G. Holmes, “Multi-level discontinuous pulsewidth modulation: common mode voltage minimization analysis,” IEE Proc.-Electr. Power Appl., vol. 151, no. 4, pp. 477-486, Jul. 2004. D. G. Holmes, “A general analytical method for determining the theoretical harmonic components of carrier based PWM strategies,” in Proc. IEEE-IAS’98, 1998, pp. 1207-1214.
