Method to enhance the short-circuit running reliability of ... - IEEE Xplore

www.ietdl.org Published in IET Power Electronics Received on 21st March 2010 Revised on 28th August 2010 doi: 10.1049/iet-pel.2010.0099

ISSN 1755-4535

Method to enhance the short-circuit running reliability of current-controlled two-stage inversion power supply J. Chen1,2 J. Chen1 C. Gong1 1

College of Automation Engineering, Nanjing University of Aeronautics & Astronautics, Nanjing 210016, Jiangsu Province, People’s Republic of China 2 Room 203, Aero-Power Sci-tech Center, College of Automation Engineering, Nanjing University of Aeronautics and Astronautics, No. 29 Yudao Street, Baixia District, Nanjing 210016, Jiangsu Province, People’s Republic of China E-mail: [email protected]

Abstract: On aviation and other high-reliablity required occasions, specific requirements of short-circuit running ability are put forward to the inversion power supply. As the inverter is running with short-circuit current which cannot decrease, and the switching frequency is at the maximum when using hysteretic current control because the output voltage is zero. Both conduction and switching dissipations of power switches are much greater than those of normal operation. This leads to overheating which is a major killer to the power switches. To enhance short-circuit running reliability, the traditional approach is to increase the switches’ power rating and the volume of heat sink, but its cost is greatly increased. In this study, a new method enhancing the short-circuit running reliability of current controlled two-stage inversion power supply is proposed. It can increase short-circuit running reliability effectively. What is more, the cost also decreases because of the non-increasing of both power rating of switches and the volume of heat sink. The key issues of this method are theoretically analysed in detail. A 200 W two-stage inversion power supply with a dual Buck inverter as its inverter part is made. The validity of this method is verified by its simulation and experimental results.

1

Introduction

In order to meet the requirements of high-precision regulation of output voltage during the wide-range changing of input voltage, the inversion power supply in airplane is mainly constructed of two-stage [1]. Usually, the inverter’s power is supplied to a number of loads. So, to enhance the running reliability, specific requirement of short-circuit running ability is put forward to the inversion power supply in airplane [2]. When one of the devices breaks down because of short-circuit, it requires the supply to provide a current that is several times as much as the rated current and lasts a few seconds to cut off the fuse of this device in order to separate it from the grid, and the inversion power supply will be automatically recovered after the faults removed. So it gets rid of total damage to the power supply because one device is short-circuited, and the reliability of the supply is greatly improved. Generally, the inversion power supply in airplane usually requires it to stand a triple the rated current and can last no ,5 s without damaging. So, this paper focuses on the power supply’s triple short-circuit operational mode. In various control methods of the inverter, hysteretic current control (HCC) is widely brought into the inversion power supply in airplane [3–5] because of the advantage of automatic current limitation which is superior to short-circuit running. As the inversion power supply is running in short-circuit current IET Power Electron., 2011, Vol. 4, Iss. 4, pp. 407–413 doi: 10.1049/iet-pel.2010.0099

which cannot decrease, and the switching frequency is at the maximum when using HCC because the output voltage is zero, both conduction and switching dissipations of power switches are much greater than those of normal operation. This leads to easy damage to the power switches because of overheating. To enhance the running reliability, traditional approach is to increase the switches’ power rating and the volume of heat sink, but the cost is greatly increased. In the investigation leading to this paper, based on a two-stage inversion power supply with a hysteretic current-controlled dual buck inverter (HCCDBI) as its inverter part, attempts are made to analyse the increase of dissipation when the circuit is shortcircuited compared with normal operation. After that, a new method enhancing short-circuit running reliability is proposed, with which the short-circuit running reliability of the inversion power supply is effectively increased. What is more, the cost decreases because of the non-increasing of both power rating of power switches and the volume of heat sink. All the evidences expressed in this paper prove that the method proposed can be widely used on aviation and other highreliability required occasions.

2

Proposing out of this new method

Fig. 1 depicts a two-stage inversion power supply. It is constructed by a DC/DC converter as its front-end and a 407

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Fig. 1 Structure of a two-stage inversion power supply

HCCDBI [3 – 8] as its buck-end, as shown in Fig. 2. The dual buck inverter is an inversion topology proposed out for aerospace, UPS and other high-reliability and high efficiency required occasions because it has the merits of no hidden danger of shoot-through and no freewheeling current flows through the body diodes of power switches. The HCCDBI has four operational modes, as shown in Fig. 3. 2.1

The dual Buck inverter’s two phase legs will operate in turn according to the cycle state (positive or negative cycle) of output current [4], and the operational modes are similar to each other under these two conditions because of its symmetrical structure. So, here frequency analysis is finished by only considering the output current’s positive half cycle for simplicity. The operational modes are shown in mode 1 and mode 2 in Fig. 3. When ignoring the parasitic resistance of the windings of inductors and considering the voltage of two DC bus capacitors to be the same, that is: VC1 ¼ VC2 ¼ Udc/2. Combine the operational modes in Figs. 3a and b, we can know that

dt

=

VL1 L1

(1)

When S1 turns on, the voltage across L1 is (Udc/2 2 u0), the current of L1 rises up, and the rising quantity is decided by DiL1 Dt1

=

(Udc /2) − u0 L1

DiL1 Dt2

=

(Udc /2) + u0 L1

(3)

So, we can know the instantaneous switching period Ts as follows

Frequency analysis of HCCDBI

diL1

Similarly, when S1 turns off, the voltage across L1 is 2(Udc/2 + u0), which is a negative value. The current of L1 falls down

Ts = Dt1 + Dt2

(4)

Combine the (2) –(4), we have Ts =

2hL1 Udc ((Udc /2))2 − u20

(5)

where 2 h ¼ DiL1 stands for hysteric current band width, u0 ¼ Esm sin(vt), Esm is the peak of output voltage. So we can deduce the equation of instantaneous switching frequency fs =

Udc l2 Udc (1 − 2l2 ) + cos (2vt) 8hL1 4hL1

(6)

where l ¼ Esm/Udc . After calculating the average of (6), we have f = Udc (1 − 2l2 ) s 8hL1

(7)

2

(2)

l Udc cos(2vt) f˜ s = 4hL1

(8)

What is more, when the output voltage is zero cross over, we have the maximum switching frequency fs max =

Fig. 2 Dual buck inverter 408 & The Institution of Engineering and Technology 2011

Udc 8hL1

(9)

Equation (7) expresses the average switching frequency f s , (8) gives out the fluctuation of switching frequency f˜ s and (9) determines the maximum frequency. These equations show that the switching frequency is alterable because of the use of HCC, the range of variation are determined by (8). When the circuit is under normal operation, the average switching loss is determined by (7). However, when the IET Power Electron., 2011, Vol. 4, Iss. 4, pp. 407 –413 doi: 10.1049/iet-pel.2010.0099

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Fig. 3 Switching modes of HCCDBI a b c d

Switching mode 1 Switching mode 2 Switching mode 3 Switching mode 4

dual Buck inverter is short-circuit and the output voltage is nearly zero, the switching frequency continues to reach the maximum. The switching loss is greatly increased which will lead fatal damaging to the power switches because of overheating. 2.2 Switching devices’ loss analysis of HCCDBI under both normal and short-circuit operation Loss analysis of a converter plays an important and guiding role on how to improve the efficiency and power density of power systems [9 – 14]. However, in this paper, a new method to enhance the short-circuit running reliability of current controlled two-stage inverter is found out by the contrast of the switching loss under normal operation and that under short-circuit operation. 2.2.1 Normal operational mode: Fig. 4 shows the performances of power switches and diodes during switching on and off. From this we can know that the processes of switches’ turning on and off are mutually coupling with that of the diodes. Considering this fact as well as the non-fixed operational frequency of the HCCDBI, it is very hard to determine the voltage and current of power switches during turning on and off which makes calculating the switching loss very difficult. In reference [14], a simple and effective method for calculating switching loss of HCCDBI is proposed. In this paper, this method is brought in. The formulas of on-state and switching dissipation are as follows s 1 T i=1

N

Pon

state

=

d(k)T (k) i2L (k) · Ron dt 0

IET Power Electron., 2011, Vol. 4, Iss. 4, pp. 407–413 doi: 10.1049/iet-pel.2010.0099

(10)

Fig. 4 Performance of the diode and switch [13]

PS on

 Ns  1 1 2 U i (k) · tr (k) + Udc IRM (k) · trr (k) (11) = T k=1 4 dc L 3 Ns  1 1 tfr2 (k) Udc iL (k) T k=1 2 tfr (k) + tf (k)  5 tfr2 (k) + VFR (k)iL (k) 6 tfr (k) + tf (k)

PS off =

(12)

In the above three equations, Pon_state , PS on and PS off stand for on-state dissipation, switching-on dissipation and switching-off dissipation of power switches, respectively. d(k)T (k) gives out the time that how long the power switches’ on-state last for the kth time. Udc stands for the DC bus voltage. iL(k), tr(k) are the power switch’s current and the rise-time when the switch turns on for the kth time. 409

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www.ietdl.org trr(k) and IRM(k) stand for the reverse recovery time and peak reverse current, respectively, during the kth time the diode turns off. tf(k) is the fall-time when the switch turns off for the kth time. tfr(k) and VFR(k) stand for the rise-time and peak forward voltage of the diode when the diode turns on for the kth time. Ns shows the switching times during an output voltage cycle. 2.2.2 Short-circuit operational mode: Known from the previous analysis, HCCDBI continues to work at maximum frequency determined by (9) under this operational mode. Also, the switching times is greatly increased during an output voltage cycle. The output current is triple the rated current with a square waveform because of the saturation of hysteretic controller. We can calculate the switching loss in the same way, the formulas are as follows Pon

PS on1 =

state1

=

Ns1 d(k)T (k) 1

T

i=1

3. Because of the introduction of two-stage structure, it makes the method of reducing the DC bus voltage to enhance short-circuit running reliability of inversion power supply a simple and feasible one. Fig. 5 expresses out the schematic block diagram of this method. The operational principle is: once the supply is shortcircuited, a short-circuit signal will be sent to the shortcircuit judgment unit through which the voltage reference of front-end circuit will be changed. So the DC bus voltage or the input voltage of inverter part will drop immediately, as a result, the switching frequency and the switching losses are reduced.

3 3.1

i2L1 (k) · Ron dt

(13)

0

 Ns1  1 1 2 Udc iL1 (k) · tr1 (k) + Udc IRM1 (k) · trr1 (k) T k=1 4 3 (14) 1 2 Udc iL1 (k) · tr1 (k) + Udc IRM1 (k) · trr1 (k) 4 3

(15)

In the equations above, Pon_stateRunning title: 1 , PS on1 and PS off1 stand for on-state loss, switching-on loss and switching-off loss of power switches, respectively. The definitions of other parameters are referring to the normal operational mode. 2.2.3 Proposing out of this new method: Based on the loss analysis in previous section, conclusion can be made that the switching loss of HCCDBI is closely relevant to the DC bus voltage, output current (current of inductor) and frequency (switching times). The higher value of these parameters, the larger the switching loss. For power switches’ switching losses of HCCDBI under different operational mode, some discussions are made as follows: 1. Power switch’s turning on (turning off) is coupled with the diode’s turning off (turning on). The switching loss is greatly affected by the reverse-recovery performance of the diode. Compared with normal operation, the reverse-recovery problem is much more serious for the value of di/dt is greater than that of normal operation when the diode is forced to turn off. That is to say, the switching loss, brought in by the reverse-recovery problem of diodes, will be greater. 2. On the one hand, in order to enhance the running reliability, the inverter is required to work under short-circuit mode. So the current cannot decrease, or rather say the switch’s on-state loss cannot decrease. On the other hand, once the switches and the diodes are selected, their parasitic parameters cannot be changed. It is easily known from the comparison and analysis of (11), (12), (14) and (15) that the reduction of switching loss can be effectively achieved by reducing the DC bus voltage: Firstly, both switching on and switching off losses decrease, which can refer to (14) and (15). Secondly, the switching frequency, or rather say the switching times, reduces in proportion to the falling down of DC bus voltage, which leads to further reduction of switching loss. The possibility of overheating is greatly reduced with the significant reduction of power loss. 410 & The Institution of Engineering and Technology 2011

Key techniques Choosing of new DC bus voltage

According to the analysis above, the power switch’s switching loss will increase a lot and it is a major killer to the power supply. A new method, reducing the DC bus voltage, has already been cited in previous sections which will be a mitigation of this phenomenon. However, the problem that how much voltage drop will be reasonable has not been resolved yet. So, in the investigation to this part, the principle of choosing new DC bus voltage is expressed out as follows. The general rule for new DC bus voltage selection is the so called switching loss mismatching rule which is shown in (16) Ps on + Ps off ≃ Ps on1 + Poff 1

(16)

Although the rule of choosing new DC bus voltage is given out in the above equation, it is very difficult to calculate the new voltage out using (16) combined with (11), (12), (14) and (15). To deal with this problem, a simulation and computation model based on Saber is employed in this paper. By integrating the switching loss’s calculating formulas into this model, all the needed parameters which are very difficult to pick out as discussed before can be extracted real time. Not only high precision can be gained, but also be more accordant to practice. The parameters of simulation are: output voltage: 115 V/400 Hz AC, output power: 200 VA, output filter capacitor: C3 ¼ 2 mF, two DC bus capacitors: C1 ¼ C2 ¼ 22 mF/250 V, two output inductors: L1 ¼ L2 ¼ 2.25 mH, DC bus voltage: Udc ¼ 360 V, the current bandwidth 2 h is chosen as 2 h ¼ DiL ¼ 25% I0 ¼ 0.5 A (I0 is the RMS value of the output current) according to the engineering experience, two power switches for back-end inverter: IXKP20N60C5M and two diodes of back-end inverter:

Fig. 5 Control diagram of the method proposed IET Power Electron., 2011, Vol. 4, Iss. 4, pp. 407 –413 doi: 10.1049/iet-pel.2010.0099

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Parasitic parameters of power switches and diodes

Typical parameters UDSS , V ID , A RDS(on) , V tr , ns tf , ns trr , ns VF , V Irrm , A

IXKP20N60C5M

DSEI8-06A

600 7.6 0.2 5 5 340 – 33

600 8 – – – 35 1.3 2.5

DSEI8-06A. The parasitic parameters of power devices are shown in Table 1. Based on the loss’s simulation and computation model, the relationship between switching dissipation under short-circuit mode (solid line) and that under normal operation mode (dotted line) against DC bus voltage is given out in Fig. 6. Contacting with the principles set forth above, the principle of new DC bus voltage selection is: approximately half the voltage of normal operation. If the new DC bus voltage is chosen under the guidance of this rule, the switching loss under short-circuit operation is close to that under normal operation, the switching loss is greatly reduced. That is to say, short-circuit running reliability is increased.

3.2

Choosing of DC bus capacitors

Another key technique is the optimal design of DC bus capacitors: if the capacitance is too small, the voltage ripple of DC bus will be large. It cannot ensure the output voltage to be sinusoidal in the whole range of input voltage (DC bus voltage). On the contrary, if the capacitance is too large, the performance of this method is not as good as expecting for the DC bus voltage which cannot drop to the new level instantaneously because of the long discharging of the two bulky capacitors. So, considering the above two aspects, the DC bus capacitors should be designed to meet both the normal working conditions and the fast response of DC bus voltage (milliseconds) when short-circuited. Comparing to the low-frequency input voltage ripple of the back-end converter, the high-frequency output voltage ripple of the front-end DC/DC converter can be ignored. The lowfrequency input voltage ripple of dual Buck inverter can be determined by equation v˜ dc =

idc P0 sin(2vt) = sin(2vt) vC vC · Udc

Fig. 6 Ps_short against Udc IET Power Electron., 2011, Vol. 4, Iss. 4, pp. 407–413 doi: 10.1049/iet-pel.2010.0099

(17)

Here v means the fundamental frequency of output voltage. So we have the equation of the maximum DC bus voltage ripple v˜ dc max =

P0 vC · Udc

(18)

In order to meet the requirement of normal operation, the maximum DC bus voltage ripple must be smaller than v˜ r (the maximum voltage fluctuation that can ensure the normal operation). So, the following equation must be satisfied C≥

P0 vv˜ g · Udc

(19)

After the DC bus capacitors are determined, the dropping time of DC bus voltage to new level can be estimated as follows: The output voltage and power equals to zero when shortcircuited. In this paper, in order to enhance short-circuit running reliability, the DC bus voltage is asked to drop to half of the original value. As a result, the energy which stored in the DC bus capacitors falls down. This part of energy is all dissipated in the back-end inverter. During the falling down of the DC bus voltage, the switching frequency and the voltage stress of power switches are changing from time to time which makes the determination of the energy coast down very difficult. For simplicity, depending on experiences, the energy coast down is chosen to 10% of the rated power, so we have 1 2 2 10% · PN · trequire = C(Udc − Udc1 ) 2

(20)

Here trequire is the expecting time that the DC bus voltage dropping to the new level. In order to better reflect the affect of this method, usually it requires trequire to be much ,5 s. So, the rule of choosing DC bus capacitor is: firstly, select the DC bus capacitor according to (19), and then using (20) to check whether the selected capacitance can meet the requirement or not.

4

Experimental verification

In order to verify the validity of the proposed method, a 200 W laboratory prototype has been built. The experimental parameters are the same as the simulation parameters given out in part three. Fig. 7 shows the waveform of output voltage, output current and driving signal for the power switches of HCCDBI at full load. The waveforms of short-circuit current and driving

Fig. 7 Experimental waveforms with full load 411

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Fig. 8 Short-circuit current when Udc equals 360 V

signals at different DC bus voltages are shown in Figs. 8 and 9. Fig. 10 is the efficiency line of HCCDBI, and Fig. 11 depicts the comparison line between the switching loss measured by experiment and that calculated out by the simulation and computation model. Some analyses are done in the following: 1. The maximum switching frequency in Fig. 7 is 80 KHz which happens at the time when the output voltage is zero cross over. From Fig. 8, it can be measured out by oscilloscope that the frequency is 80 KHz and continued to reach the maximum once the HCCDBI is short-circuited with the DC bus voltage 360 V. This is consistent with the frequency analysis. 2. In Fig. 9, the frequency changes to 52 KHz when shortcircuited under new DC bus voltage (180 V). There is a certain deviation from the theoretical analysis. This is mainly because of the non-linearisation of magnetisation curve. That is, there is a small reduction of inductance when the current increases.

Fig. 11 Short-circuit losses against Udc

3. The efficiency line of HCCDBI is shown in Fig. 10. The total loss is 9 W at full load. However, From Fig. 11, it is known that the total loss rises up to 35 W when shortcircuit with a 360 V DC bus voltage. It is as much as to say that the loss of HCCDBI is markedly increased. To increase the volume of heat sink is needed in order to ensure the fairly good heat dissipation. But if the new method proposed in this paper is brought in, the loss of HCCDBI will be greatly decreased. This keeps in close pace with the theoretical analysis. 4. Pexperiment and Psimulation in Fig. 11 are the total loss measured by experiment and that calculated out simulation model, respectively. But the simulation result is a little bit smaller than the experimental result. Three aspects are taken into consideration here: Firstly, there must be some derivations between calculation and the actual situation. Secondly, the power losses caused by eddy current, parasitic parameters and residual magnetism are ignored during calculation. Thirdly, during the simulation process, all the parameters are traded to be constant without being affected by environment, such as the operational temperature and humidity. However, as can be easily found in this figure that the trends of experimental and simulation results are the same. So, if a certain range of error is permitted, the simulation and computation model is correct. Based on the above analysis, the following two facts illustrate the validity of this new method on increasing shortcircuit running reliability of the inversion power supply, that is:

Fig. 9 Short-circuit current when Udc equals 180 V

1. The switching frequency is greatly reduced (from 80 to 52 KHz) after the reduction of DC bus voltage which can be referred to in Figs. 8 and 9. 2. The switching loss under new DC bus voltage when shortcircuited is no more than that of normal operation as is shown in Fig. 6. In addition, from Fig. 11, we can directly get the information that the decreased from 35 to 22 W, which is a large amount of reduction, when the DC bus voltage drops from 360 V to the new level designed above.

5

Conclusion

In this paper, a new method enhancing short-circuit running reliability of current controlled two-stage inversion power supply, reducing the DC bus voltage when short-circuit, is proposed out. This new method has the following merits:

Fig. 10 Efficiency line 412 & The Institution of Engineering and Technology 2011

1. To the widely used two-stage inversion power supply, the method of reducing the DC bus voltage is a very simple and feasible one. Once the supply is short-circuited, a short-circuit signal will be sent to the short-circuit judgment unit through IET Power Electron., 2011, Vol. 4, Iss. 4, pp. 407 –413 doi: 10.1049/iet-pel.2010.0099

www.ietdl.org which the voltage reference of front-end circuit will be changed. As a result, the DC bus voltage or the input voltage of the HCCDBI will drop immediately. According to the simulation and experimental results in this paper, the switching loss is greatly reduced after using this method. 2. There is no need to increase the power rating of power switches and the volume of heat-sink because of the bringing in of this method. The simulation and experimental results prove that the method proposed in this paper can be widely used on aviation and other high-reliability required occasions.

6

Acknowledgment

This paper was supported by the National Basic Research Program of P.R. China (2007CB201303).

7

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