ECE 565 — VLSI Design Automation

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ECE 565 — VLSI Design Automation

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Text: S.M. Sait and H. Youssef, VLSI Physical Design Automation, World Scientific ... (1) Sabih H. Gerez, Algorithms for VLSI Design Automation, Wiley, 1998.

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ECE 565 — VLSI Design Automation Fall 2010 MW 2-3:15 pm Teaching Staff Instructor: Professor Shantanu Dutt, 355-1314, 930 SEO email: [email protected], URL: http//www.ece.uic.edu/˜dutt Instructor’s Office Hours: M/W: 3:30-4:30pm Course web page: http//www.ece.uic.edu/˜dutt/courses/ece565/ece565.html Check this page at least once a week for important messages and announcements. Course Material Text: S.M. Sait and H. Youssef, VLSI Physical Design Automation, World Scientific Publishing Company, 1999 (# ISBN-10: 9810238835 # ISBN-13: 978-9810238834). Reference Texts: (1) Sabih H. Gerez, Algorithms for VLSI Design Automation, Wiley, 1998. (2) Srinivas Devdas, et al. Logic Synthesis, McGraw Hill, 1994. (3) Soha Hassoun and Tsutomu Sasao, Logic Synthesis and Verification , Springer, 2005. Lecture Notes: Some have been posted on the course webpage and others will be handed out in class. It is very important for you to print out the lecture notes on the webpage so that you can follow the class lectures that will mostly use these notes. Most of the class material will be based on these notes which have been derived from the text and sources. Course Outline 1. 2. 3. 4. 5. 6. 7. 8. 9. 10.

VLSI CAD Flow Chip Layout Styles High-Level Synthesis Algorithm Design Approaches for VLSI CAD Brief Exposition of Logic Synthesis and Tech. Mapping VLSI and Circuit Design Issues (power and delay analysis and minimization) Partitioning Floorplanning Placement Global and Detailed Routing

Grading Tentatively based on: (1) 2-3 homeworks (15%), (2) a midterm exam (20%), (3) a midterm mini papapers (20%), and (4) a final project, report and per presentation (10-12 slides, 15 mins)—based on presentation (approx. 20-25 slides, 30-40 mins) (45%)

Desired Background : Algorithms (most important—need to have taken or concurrently take CS 401 or equivalent), programming, logic design and VLSI design.