International Transactions on Systems Science and Applications Volume 2 Number 2 (2006) 191-196 www.xiaglow-institute.org.uk/itssa/
System-on-Chip Design of a Fuzzy Logic Controller Based on Dynamically Reconfigurable Hardware Francisco Fons Mariano Fons Enrique Cantó Department of Electronic, Electrical & Automatic Control Engineering University Rovira i Virgili, ETSE, 43007 Tarragona, Spain Email: {francisco.fons; mariano.fons}@estudiants.urv.cat,
[email protected] http://www.etse.urv.cat/DEEEA/ Abstract: Fuzzy Logic is, nowadays, a control technique widely extended in nonlinear system applications. This work adds a new point-of-view to the continuous efforts in search of an optimized hardware-software co-design of a dual-input single-output fuzzy logic controller (FLC). Our approach breaks up with the classical three-stage implementation process fuzzification, rule inference and defuzzification cores to focus it on directly synthesizing the resultant control surface. An innovative design methodology is defined by firstly splitting the total area in rectangular sectors to, afterwards, model each of them by second-order polynomial functions. The algorithm is finally embedded in a MCUFPGA platform to achieve a balanced cost-performance solution inspired by such efficient concepts in terms of runtime and silicon-area as parallel processing and dynamic partial reconfiguration, respectively. The result is a universal FLC where the control surface is parameterized and handled through a simple data file appended to the design bitstream in the way of initialized SRAM memory. This HW/SW architecture therefore provides a general-purpose solution able to customize whichever fuzzy application by only updating the data that model the particular control surface segmented in rectangular sectors. Keywords: fuzzy logic, hardware-software co-design, dynamically reconfigurable FPGA, system-on-chip.
1. Introduction Fuzzy Logic theory, formally introduced in 1965 by Lotfi A. Zadeh, has been successfully applied to many engineering problems. It emerges as a really useful alternative in those scenarios where the mathematical model of the system is either unattainable or, on the contrary, in spite of reaching it, its inherent complexity makes unsuitable its use. In recent years, this technique has become more and more popular mainly because of two reasons: it offers a universal solution to convert human knowledge into functional rules that, even though they handle imprecise information, may give rise to accurate results; in addition, the intuitive reasoning methodology in which it is inspired allows the easy interpretation and traceability of these results. Concerning the implementation architectures of fuzzy systems, several technological alternatives are present nowadays in many application fields: (i) flexible softwarebased (SW) solutions oriented in stand-alone RISC, CISC or
DSP processors, (ii) dedicated hardware (HW) circuits based on ASIC or ASSP devices that high-perform the fuzzy algorithm by means of customized VLSI implementations [5, 7], or finally, (iii) mixed HW/SW platforms where a sensible MCU-FPGA partitioning lets schedule the algorithm through different tasks and perform them in parallel [6]. Our work is included into this third group and the digital fuzzy controller is embedded in an Atmel AT94K40 system-on-chip (SoC) device: a MCU plays the role of master of the multi-processor system and is responsible for handling the control and supervisory tasks of the algorithm while a FPGA synthesizes a slave MAC (multiply-and-accumulate) coprocessor that takes charge of the intensive arithmetic computing. As novelty, our design does not follow the traditional implementation process based on directly synthesizing the three fuzzy stages but it contributes to optimize the physical HW/SW resources by placing just the control function product of all that theoretical three-stage study previously modeled off-line. As application example, the work pays attention to a two-input one-output fuzzy system given that most of control applications – such as DC-DC converters in industrial electronics – make use of this topology; additionally, the feature of handling only three variables in total allows us to show and assimilate the results in a graphical 3D representation. This paper describes a new and generic design methodology to efficiently develop a FLC in a SoC platform. Next section presents the classical fuzzy design flow with emphasis on the resultant control surface. Section 3 covers the algorithmic aspects and the development considerations of the FLC as well as its porting to a SoC device. The experimental results are discussed in section 4. Finally, section 5 concludes the work.
2. Fuzzy Logic Fundamentals Fuzzy Logic is not fuzzy logic; it is a precise logic of imprecision. Its potential to linguistically describe with simple rules the experience and knowledge of a human expert in order to control a plant without the need of the mathematical model has motivated a great increase of engineering applications at present based on fuzzy techniques [4]. Given a plant or process as scenario, it is planned to control it under certain behavioral specifications to get a suitable realtime dynamic response. For this, it is necessary to connect the plant to a controller that is going to carry out the closed-loop
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control of the system, as shown in Fig. 1. The controller interface is composed of two inputs x-y and one output z, and the dynamics of the whole plant-controller would be modeled by functional rules aimed at the plant output v0 tracks the reference input vref in real-time. vref(t)
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three-stage algorithm can be directly carried out in software and/or hardware. Despite this, we launch a new proposal focused on directly implementing the resultant control surface z=f(x,y) obtained in the fuzzy study instead of going through the specific implementation of the fuzzifier, rules-based inference engine and defuzzifier. Our approach does not demand a concrete fuzzification or defuzzification method since it takes just the resultant control surface coming from the fuzzy development. Therefore, this feature adds flexibility to the design, without loosing generality, in order to reach a universality-oriented FLC.
Fig. 1. Fuzzy-based control system of a DC-DC converter. 3.1 Fuzzy Algorithm Three sequential layers set up the classical fuzzy development process. The first stage is the fuzzification: here the input variables of the controller are quantified in fuzzy sets (of triangular, trapezoidal, rectangular… shapes) that define the membership functions, as NM (negative medium), NS (negative small), ZE (zero), PS (positive small) and PM (positive medium) of Fig. 2. Next, the inference procedure works with If-Then rules where the fuzzified inputs, linked by AND/OR fuzzy operators, are evaluated. All the inference rules are computed together and the result is aggregated into a single fuzzy set of the output variable. This partial result is finally processed in the third stage, known as defuzzification, where several options are possible to obtain a single number as crisp output value: middle of maximum, center of gravity, largest of maximum, Takagi-Sugeno method, etc. As noticed, the three layers offer certain flexibility in choosing the more appropriate strategy and this decision is up to the expert developer according to his/her background of the particular application. But independently of the methods used, the result is always a function in charge of computing an output value z for each x-y input. When all the inputs range is covered, a control surface is obtained that well describes the behavior of the controller, as depicted in Fig. 3. NM NS ZE PS PM X(k)
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Fig. 2. Three-stage fuzzy process.
3. Hardware-Software Co-design Many research efforts have been put on finding strategies to accelerate the fuzzy processing as well as optimizing its implementation. Motorola, for example, developed the first standard MCU (MC68HC12) provided with a silicon-based fuzzy inference kernel along with a fuzzy logic instruction set extension in order to reach simplified programming, reduced code size and faster code execution. Other alternatives are inspired in FPGA-based designs [2, 3]. Getting the support of simulation tools is also a habitual trend in the theoretical development of fuzzy control systems to ensure consistent controllers. Matlab-Simulink, for instance, offers a fuzzy logic toolbox that permits one to perform all the fuzzy stages. Once the controller is modeled, the physical implementation of the
Nonlinear surfaces z=f(x,y) result when designing a twoinputs one-output FLC for controlling a nonlinear system. An initial option for implementing this two-dimensional function would be to directly store the control surface point-by-point into a look-up table (LUT) but it is easy to realize that this would spend an intolerable amount of memory resources, where the total size would depend on the system complexity [1]. Our challenge then is to split the control surface z=f(x,y) in a set of n rectangular areas and model each of them by a second-order function through multiple polynomial regression, that is, z = f(x,y) = a + bx + cy + dxy + ex2 + fy2 where the surface of each rectangular sector, limited by its two extreme up-left and down-right vertexes (xul,yul) and (xdr,ydr), yul d y d ydr, xul d x d xdr, becomes totally defined by 6 coefficients (a, b, c, d, e, f). The key factor consists in finding the convenient n rectangles in which the surface should be split in order to reach the modeling of the partial surfaces as similar to the original fuzzy control surface as possible, within an acceptable error H. Mathematical-statistical software tools, e.g. Minitab, can assist this development task. The number of rectangles n and their sizes, i.e. (x0,x1,…xj), (y0, y1,…yk) partitions, are a function of the control surface, which obviously, in the last term, depends on the features of the whole plant-controller. The partitioning of the surface into rectangular parts is intended to make feasible its subsequent storage and indexing in memory (2D-coordinates and polynomial coefficients). In fact, the resultant n rectangular sectors that comprise the whole control surface are indexed and stored in increasing order into SRAM – as a function of the Y and X components of their extreme vertexes, and considering the component Y of higher weight than the component X – as depicted in Fig. 3. This flexibility in segmenting the surface, moreover, permits to cover not only continuous surfaces but also discontinuous ones typical of nonlinear systems (saturation effects, etc). All this conditioning has to allow us later to make use of a binary search algorithm to find in real-time the sector where each periodic sampling point (x,y) gets fitted. Also, it is important to note that, until now, both fuzzy development process and surface polynomial modeling are tasks carried out off-line; in fact, they constitute the theoretical analysis previous to the system implementation and are not performed at execution time but at development time in order to simplify the design and reduce at maximum the cost of the HW/SW implementation. The control algorithm is periodically executed to determine the system output z based on the instantaneous analog inputs x and y acquired at a given sampling frequency. For each point
International Transactions on Systems Science and Applications 2(2) (2006) 191-196
(x,y) sampled, the system has to locate the surface sector where it is contained – in accordance with its characteristic extremes (xul,yul), (xdr,ydr) – and apply then the particular second-order function – defined by its custom coefficients (a, b, c, d, e, f) – to compute and release the output z. 0 x0 y0
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Fig. 3. Segmentation and indexing of the surface z=f(x,y). All the system design and development for a particular application example can be modeled and simulated by software before proceeding to the final implementation of the solution into an embedded system. This analysis has to reveal important features to take in consideration just in the following stage of partitioning and scheduling of the application into HW and SW tasks. Our fuzzy algorithm is divided into two main processing tasks: binary search and arithmetic computing. Thus, the whole algorithm has been developed by SW and executed on a MCU and it has been noticed that the most time-critical task is the arithmetic computing. Just this task has been then strongly accelerated by a custom HW implementation while the binary search is programmed by SW. Given the control variables x and y and the resultant control surface z=f(x,y) that covers all the range of points (x,y) divided into 2N sectors, the binary search allows us to find the sector that includes the sampling point (xi,yi) in only N iterations, as shown above in Fig. 4. /* Xp: 16-bit, Yp: 16-bit, YpXp: 32-bit YpXp= (Yp(15)..Yp(0)Xp(15)..Xp(0)) */ unsigned short Xl[0x100], Yi, Xi; unsigned long YuXl[0x100], YdXr[0x100], YiXi; void BinarySearch(void) { unsigned char bit, ind, mask; bit=7; ind=0; do { mask=(1