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IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 61, NO. 8, AUGUST 2014
Thermal Modeling of Multi-Fin Field Effect Transistor Structure Using Proper Orthogonal Decomposition Wangkun Jia, Brian T. Helenbrook, and Ming-Cheng Cheng, Senior Member, IEEE
Abstract— An approach is proposed to project thermal behavior in a semiconductor integrated-circuit structure onto a functional space based on the proper orthogonal decomposition (POD). The approach substantially reduces the numerical degrees of freedom (DOF) needed for thermal simulations and requires no assumptions about physical geometry, dimensions, or heat flow paths. The POD approach is applied to a multi-fin FinFET structure having heat sources driven by power pulse excitations with time shifts, width variations, and amplitude modulations. The POD models were compared with detailed numerical simulations (DNS) and it was shown that the POD approach provides thermal solutions that were as accurate and detailed as the DNS. It offers a reduction in numerical DOFs by nearly six orders of magnitude to capture the peak temperatures in multi-fin FinFETs. Index Terms— Compact thermal model (CTM), FinFET, proper orthogonal decomposition (POD), reduced-order model (ROM), thermal simulation.
I. I NTRODUCTION
A
S A RESULT of aggressive downscaling of semiconductor devices in the last several decades, short channel effects (SCEs) [1]–[3] have been one of the major obstacles for further improvement of integrated circuits (ICs). To minimize the SCEs, multigate field effect transistors [3]–[13], such as double-gate transistors [3]–[6], Flexfets [7], and FinFETs or trigate transistors [8], were introduced. Among these structures, the FinFET technology has become a promising candidate to overcome the SCEs due to its superior performance in low-leakage and highdriving currents, compared with other technologies [9]–[11]. The FinFET structure, however, suffers more serious selfheating effects (SHEs) than planar MOSFET devices [12], [13], especially for the Silicon on insulator (SOI)-based FinFETs. In addition, as semiconductor technology scales down, the higher IC density further enhances the power density and
Manuscript received April 5, 2014; revised May 22, 2014; accepted June 17, 2014. Date of current version July 21, 2014. This work was supported by the National Science Foundation under Grant DMS-1217136. The review of this paper was arranged by Editor R. Venkatasubramanian. W. Jia and M.-C. Cheng are with the Department of Electrical and Computer Engineering, Clarkson University, Potsdam, NY 13699-5720 USA (e-mail:
[email protected];
[email protected]). B. T. Helenbrook is with the Department of Mechanical and Aeronautic Engineering, Clarkson University, Potsdam, NY 13699-5725 USA (e-mail:
[email protected]). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TED.2014.2332414
results in more serious heating problems, particularly for the 3D stacking technology. Concerns of heating effects on FinFET devices/circuits [12]–[16] and 3-D stacked ICs [17], [18] have been raised in many recent studies. To account for the severe heating effects on performance and reliability of the downscaling semiconductor chips, it is necessary to have the capability of predicting temperature distributions in individual devices, and in systems Compact thermal models (CTMs) are usually applied to obtain temperature distributions from the transistor to system levels [19]–[23] because of their computational efficiency. The CTMs are generally constructed based on lump thermal elements, such as thermal resistors, capacitors, and sources. The approach, however, only provides a coarse thermal solution [19]–[23]. To resolve temperature profiles, detailed numerical simulation (DNS) is usually needed. The DNS is, however, prohibitive for simulation of semiconductor ICs due to its high-computational cost. In this paper, we present an application of reduced-order modeling (ROM) known as the reduced-basis element method [24], [25] to thermal modeling of a multi-fin FinFET structure. The ROM in this paper is based on the proper orthogonal decomposition (POD) [26]–[28]. The POD processes spatial and temporal thermal data derived from DNS of a domain structure subjected to excitations of interest to extract basis functions (or POD modes). In most of systems, only a very small number of POD modes is needed to represent the steady and dynamic thermal behaviors of the system. The POD model is therefore able to offer thermal solutions as accurate and detailed as DNS, while substantially reducing the numerical degrees of freedom (DOF) needed for thermal simulation. The POD has been applied to many different fields, such as fluid dynamics [29], [30], aerodynamics [31], microelectromechanical systems (MEMS) [32], and so on. Recently, POD was applied to thermal modeling of semiconductor structures [33]–[35]. In addition to the accuracy and efficiency, one of the major advantages of the POD approach is that the method does not require any assumptions on the physical geometry, dimensions, or heat flow paths that are usually needed in the CTMs. In addition, the POD approach offers more detailed solution and is even more compact than the CTMs. In this paper, the POD approach is applied to a 3-D SOI multi-fin FinFET structure, including the device, metal contacts, and metal/polywires embedded in oxide, to build a thermal model. The concept and brief derivation of the
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JIA et al.: THERMAL MODELING OF MULTI-FIN FIELD EFFECT TRANSISTOR STRUCTURE USING POD
POD approach is first introduced, and extraction of the POD modes is discussed. A steady-state POD model for the multifin FinFET structure is developed and verified against the DNS. Two dynamic POD models for the FinFET structure are constructed, one using a periodic power pulse train and the other a synchronized random pulse train. Each of these two models is verified against the DNS using power sources with several variations, including unsynchronized random power pulses and pulses with width and amplitude variations and shifts in time. Such variations of power pulses are commonly observed in digital CMOS circuits. The POD approach is also examined with realistic boundary conditions (BCs) in a FinFET structure, where thermal influences from surrounding FinFETs via oxide and metal wires are considered.
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observations. Using the snapshot method, (3) can be converted into a different eigenvalue problem described by A u = λ u where the Ns × Ns matrix A can be written as 1 Ai j = T ( x , ti ) T ( x , t j )d x Ns
(5)
(6)
and Ns is the total number of snapshots or observations. After the eigenvectors u and eigenvalues λ of A are determined, each POD mode ϕ can be evaluated as a linear combination of instantaneous observations [38], [39] s 1 u(t j )T ( x , t j ). Nt λ
N
ϕ( x) =
(7)
j =1
II. T HERMAL M ODEL D ERIVATION BASED ON POD The temperature field T ( x , t) in a domain is represented by a linear combination of basis functions (modes) ϕi as T ( x , t) =
M
ai (t)ϕi ( x)
(1)
i=1
where M is the number of modes or DOF used to represent the temperature solution and ai is the time-dependent coefficient for each mode. Selection of the basis functions in (1) is not unique. It is, however, of best interest to select a set of basis functions that offer the best approximation for the exact solution using a smallest number of modes. In this paper, POD is used to derive basis functions that are optimal in the least squares sense [36], [37]. An optimal set of the POD modes can be obtained by maximizing the mean square inner product of the thermal solutions with the POD mode in the selected physical domain 2
T ( x , t)ϕ d
To create a dynamic CTM in the eigen space, the weak form of the heat conduction equation is applied ∂ρC T + ∇ϕ · k∇T d ϕ ∂t = ϕ Pd (x, t)d − ϕ(−k∇T · n )d, ∀ϕ (8)
ϕ 2 d
(2)
where the brackets indicate an average. In steady-state cases, the average may be obtained over different power levels and/or BCs. In dynamic cases, this is the temporal average subjected to different power levels and/or different BCs as well. This maximization problem results in the Fredholm equation for the POD modes R( x , x )ϕ( x ) d x = λϕ( x) (3)
where k is the thermal conductivity, Pd is the power density, ρ is the density, C is the specific heat, is the boundary surface, and n is the outward normal vector of the domain. Once the number of modes is determined, the spatial integrals in (8) can be preevaluated to construct an M-dimensional ordinary differential equations for ai dai + gi, j a j = Pi , i = 1 to M dt M
ci
(9)
j =1
where ci and gi, j are the elements of the thermal capacitance and conductance matrices in the function space and given by ci = ρCϕi2 d, gi, j = k∇ϕi · ∇ϕ j d. (10)
ai and Pi denote the temperature and power dissipation in the POD function space, respectively. Usually the shape of the power density is predefined and the integral for P can be preevaluated. Once c and g matrix are preevaluated, these integrals can be stored in a technology library for solving ai from (9). With the determined ai , the temperature field can be reproduced from (1).
x
where R( x , x ) is an two-point correlation tensor given as
x , t)T ( x , t) . (4) R( x , x ) = T ( Equation (3) represents a continuous eigenvalue problem, λ is the eigenvalue, and the POD modes are the eigenfunctions. The data T ( x , t) in this paper are collected from the DNS. For discrete data, (3) involves solving an Nx × Nx eigenvalue problem, where Nx is the number of grid points. In a 3-D domain, this approach requires intensive computational effort. The method of snapshots [38] is applied in this paper to convert this Nx × Nx problem into a problem with a considerably smaller dimension determined by the number of
III. A PPLICATION TO AN I SOLATED F IN FET S TRUCTURE A five-fin SOI FinFET structure shown in Fig. 1, including the device, poly/metal wires, and metal contacts, is used in this paper. The dimension of this structure are described as follows: the gate length L g = 22 nm, the fin height H f = 45 nm, the fin width W f = 22 nm, the oxide thickness tox = 2 nm, the gate width Wgate = 70 nm, the gate height Hgate = 82 nm, the spacing between fins dspace = 118 nm, the fin length L f = 60 nm, the source/drain pad dimensions, Ws × L s = 44 × 604 nm2 , the polypad dimensions, W p × L p = 44 × 88 nm2 , the metal contact height h c = 115 nm above the device, and the metal-1 thickness tm = 50 nm. The device is placed on
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IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 61, NO. 8, AUGUST 2014
Fig. 2. Fig. 1.
Eigenvalues in decreasing order of magnitude.
Five-fin SOI FinFET structure. TABLE I M ATERIAL P ROPERTIES
a BOX with thickness tBOX = 100 nm. The thickness of the silicon substrate under the BOX is tsub = 1 μm. Material properties used in simulations are shown in Table I. The following power pulses are generated periodically for constructing the POD thermal models: Pd = Pmax e10(cos(2π f t )−1)
(11)
where f = 2 GHz and Pmax = 1.98 × 10−5 W. For the synchronized random pulse train, (1) is applied with 50% of the power pulses turned OFF randomly. In each pulse train, the DNS is performed for 20 periods (10 ns) with 100 time steps for each period. The power is deposited at each channel– drain junction. In this section, all the boundaries are adiabatic except for the bottom of the substrate that is fixed at ambient temperature. To reach as much as possible the accuracy and resolution of the DNS, the identical mesh structure, and time steps used in DNS are applied in the POD model. Selection of the time steps and mesh sizes in the DNS is based on the desired resolution. In this paper, very fine meshes are used near the channel–drain junction to be able to capture accurate hot spots, which leads to approximately two million nodes in the simulations of the five-fin FinFET structure. A. Periodic POD and Synchronized-Random POD Models In this section, two POD models for the five-fin SOI FinFET structure are generated, one using the periodic power pulse train and the other a synchronized random pulse train. The eigenvalue spectrums of the two POD modes are shown in
Fig. 3. Dynamic temperature evolution at the channel–drain junction next to the polywire derived from DNS and the POD models. (a) Periodic POD model using an excitation of periodic pulses. (b) Synchronized-random POD model using an excitation of a synchronized random pulse train with a different random sequence. Each inset enlarges results near a pulse peak.
Fig. 2. The eigenvalues represent the mean squared temperature variation captured by each mode ϕi . The fast decrease in the eigenvalues shown in Fig. 2 suggests that the thermal solution can be well approximated by a small number of modes. In addition, these two models have similar eigenvalue spectrums, which indicate that the periodic and synchronized random POD models offer similar accuracy when using the same number of modes. Fig. 3(a) and (b) illustrates dynamic temperatures at the channel–drain junction next to the polywire of the FinFET structure derived from the POD models and DNS. In these results, each POD model is applied to the structure with the same type of source excitation used in constructing the model.
JIA et al.: THERMAL MODELING OF MULTI-FIN FIELD EFFECT TRANSISTOR STRUCTURE USING POD
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TABLE II L EAST S QUARE E RRORS OF POD M ODELS
For the case of the synchronized random pulses, a random sequence different from that used in the model construction is applied. The POD models using only 1 mode reveals large errors, as expected. Using 2 modes, the errors near the peak are around 10%–15%. The POD models using 4 and 6 modes are however, in excellent agreement with DNS. When 6 modes are used, the DNS and POD give nearly identical results. To study the adaptability of POD, each of the two POD models is applied to the cases using excitations of the periodic and synchronized-random power pulses. As displayed in Table II, excellent agreement between DNS and POD is obtained regardless of the type of excitation used for either of the POD models with 4 or 6 modes. The least square error shown in Table II for any of the POD models using either of the excitations is
