ASIC Design of the Linearisation Circuit of a PTC ... - IEEE Xplore

ASIC Design of the Linearisation Circuit of a PTC Thermistor S. Roy Chowdhury1, C. Pramanik2, H. Saha3 IC Design and Fabrication Centre, Dept. of E.T.C.E., Jadavpur University, Kolkata. E-mails: [email protected], [email protected], 3 [email protected] Abstract The paper describes the ASIC (Application Specific Integrated Circuit) design of the linearization circuit of a PTC thermistor sensor. The linearizer circuit is based on the use of a ratio-logarithmic amplifier. The basic idea is to logarithmically linearize the exponential input-output relationship of PTC thermistor sensor. Compared to other conventional techniques, viz. look up table method, polygon interpolation method, polynomial interpolation method, method of linearization using programmable gain amplifiers, the scheme provides a low cost simple alternative technique of linearization, linearizing the PTC thermistor voltage output signals to a high accuracy. Further, CMOS circuits have been used to have a minimal power dissipation of the circuit. The circuit is found to dissipate a power of 3.125 mW in a supply voltage of 5 Volts. A SPICE model of a PTC thermistor has also been developed. The entire scheme has been done using the TSPICE software.

1. Introduction: PTC thermistors are widely used as temperature sensors. Unfortunately, there exists a non-linear relationship between the temperature sensed by a PTC thermistor and the thermistor resistance and with the voltage across it. Hence, for the ease of calibration, we need to have a linearization of the characteristic of a PTC thermistor. The paper describes a simple scheme of a linearizer circuit compared to the previous schemes. Unfortunately, each of these techniques suffers from inherent drawbacks. The look up table method requires a large memory for good accuracy, which leads to high cost. The polygonal interpolation method is applicable to sensors with a piecewise linear characteristic and is hence unsuitable for sensors with absolutely non-linear characteristic because in such case, the number of reference points will be very large. The polynomial interpolation method is usable under the limitations of order of relationship between the input and output of sensors [1,2]. Programmable gain amplifier [3], although provides an efficient technique of linearization, is costly. The scheme under consideration provides a low cost simple alternative technique of linearization, linearizing the PTC thermistor voltage output signals to a high

accuracy. The scheme employs CMOS circuits, which have very low power dissipation.

2. PTC thermistor characteristic:

and

its

The resistance of PTC thermistors increases exponentially with the rise in temperature. The temperature resistance relationship of such a type of thermistor is given by: RT=R0eCT+D………..…………………………..…(1)  where, RT=Resistance of the thermistor at T Kelvin. R0= Resistance of the thermistor at ice point. C and D are constants dependant on the material of the PTC thermistor [4]. The voltage output response of a thermistor is thus given by VT=V0eCT+D………………………..…….………(2) Where, VT=Voltage across the thermistor at T Kelvin. V0= Resistance of the thermistor at ice point. The resistance versus temperature and voltage versus temperature characteristic of the thermistor is given as follows:

Fig 1. PTC thermistor resistance characteristics

Fig 2. PTC thermistor voltage output characteristics Thus we see that the output voltage characteristic of the sensor is highly non linear. For the ease of calibration we need to linearize the characteristic of the sensor.

3. Theory of logarithmic amplifier: The figure 3 shows the basic circuit of a logarithmic amplifier:

Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID’05) 1063-9667/05 $20.00 © 2005 IEEE

Fig 3 Basic Circuit of a Logarithmic Amplifier The input voltage is turned into an input current by the resistance Ri. This current feeds the p-n junction diode. The diode is used as a current to voltage converter. To find an output equation, we start with the basic Shockley equation for P-N junctions [5]: I = Is (e qVd/nkT - 1), where symbols have their conventional meanings. Therefore, Vout = - Vd = -(nkT / q) ln ( V / Ri I s)…………….(3) The logarithmic amplifier discussed above suffers from two severe drawbacks. In equation (3), we find that the output voltage is proportional to the circuit temperature T. This is quite undesirable. Also, the rise in temperature will cause a fall in the diode resistance causing an increase in the diode current. Secondly, the current Is can constantly vary between devices and is also temperature sensitive, approximately doubling for every 100C [5]. One way of removing the effect of Is is to subtract an equal effect. The circuit of figure 4 exactly does this. This circuit utilizes two logarithmic amplifiers. While each is drawn with an input resistor and input voltage source, removal of resistors Ri1 and Ri2 would allow currently sensing inputs. The diodes are identical, so that their I-V characteristics are identical. Using equation (1), we find VA = -(nkT / q) ln ( VIN1 / Ri1 Is1).................................(4) VB = -(nkT / q)ln(VIN2/Ri2 I s2)…………………..……(5) Typically, Ri1= Ri2. These two signals are fed into a differential amplifier consisting of operational amplifier OA3 and resistors R3 through R6.The output of differential amplifier at point C is given by, VC = VB - VA = (nkT/q)ln[(VIN1/Ri1 I s1) / (VIN2/Ri2I s2)]…..……….(6) Since, Ri1 is normally set equal to Ri2 , and I s1 and I s2 are identical because diodes D1 and D2 are identical, hence equation (6) may be rewritten as VC = -(nkT / q)ln[(VIN1/ VIN2)] Hence, the effect of Is has been removed. VC is a function of the ratio of the two inputs. Therefore, this circuit is called a logarithmic ratio amplifier. The only remaining effect is that of temperature variation. The operational amplifier OA4 serves this purpose. In this non-inverting amplifier, a temperature sensitive resistor R8 is used. This component has positive temperature coefficient of resistance, meaning that as temperature rises, so rises its resistance. Since the gain of this stage is

(1+R7/R8), a temperature rise causes a decrease in gain. Combining this with equation (6) produces Vout = (1+R7/R8)(nkT / q)ln[VIN1/VIN2] Hence, Vout =Aoln[VIN1/VIN2]……………..……….(7) where, Ao= (1+R7/R8)(nkT / q). The idea of ratio-logarithmic amplifiers employing bipolar technologies has been found in some previous literatures [5,6,7,8,9]. However, in the scheme under consideration, we attempted to design ratio-logarithmic amplifiers using CMOS technology to design a circuitry with lower power dissipation.

Fig. 4 Circuit diagram of the ratio logarithmic amplifier

4. Theory circuit:

for

proposed

linearizer

To linearize analog sensor signals equation (7) can be modified as Vout(x)= Aoln[VIN/VREF(x)]……………..…...……..…(8) and Where, VIN=V1=E(x)+E VREF(x)=[Er/(1+k)]+[k/(1+k)]E(x), ‘x’ being the physical variable under measurement. Then equation (8) can be written as Vout(x) = Aoln[{E(x)+E}/{Er/(1+k)]+[k/(1+k)]E(x)}] Thus, Vout(x)=Aoln[{(1+k)(E(x)+E)/Er}/{1+kE(x)/Er}]…..(9) Here, E(x) is the analog output voltage signal from the transducer and E is the constant dc voltage used to ensure that Vout(0)=0 Er is a dc voltage and k is a constant. By selecting the appropriate values for linearizing parameters ‘k’ and Er, the linearity of the signal E(x) can be improved. In order to satisfy the condition Vout(0)=0, assuming that E(0)=0, the value of E should be such that Aoln[E/(Er/(1+k))]=0 Ö E=Er/(1+k) A circuit that may be used for linearization of sensor output signal when positive value of k is required is shown in the figure below:

Fig. 5 Block diagram of the linearizer circuit From the above circuit, VIN=V1=E(x)+E And,VREF(x)=[Er/(1+R2/R1)]+[(R2/R1) / (1+( R2/R1)]E(x) Comparing with the expression of VREF(x) in equation(8) we have,

Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID’05) 1063-9667/05 $20.00 © 2005 IEEE

K= R2/R1, where k is the linearizing coefficient. Then, Vout(x)= Aoln[VIN/VREF(x)] = Aoln[{E(x)+E}/ {Er/(1+k)]+[k/(1+k)]E(x)}] =Aoln[{(1+k)(E(x)+E)/Er}/ [1+kE(x)/Er}]..…......….(10) The logarithmic form of the final expression makes it suitable for linearization of those sensor output characteristics that are of exponential nature. Hence the scheme can perform linearization of output characteristics of ptc thermistor (thermistors with positive temperature coefficient of resistance).

Fig. 6 SPICE model of PTC thermistor

6. Simulation and results: 5. Linearization of the characteristic of PTC thermistor by the proposed scheme: From equation (10), we have, Vout(x)= Aoln[{(1+k)(E(x)+E)/Er}/{1+kE(x)/Er}] Putting E(x)= VT, and x = T( since the non electrical quantity to be sensed is the temperature), we have Vout(T) = Aoln[{(1+k)( VT+E)/Er}/ {1+k VT/Er}] = Aoln[{((1+k)/Er)VT+((1+k)/Er)E}/{1+k VT/Er}]...(11) Putting equation (3) in (11), we have, Vout(T) =Aoln[{((1+k)/Er)V0eCT+D+((1+k)/Er)E}/{1+kV0eCT+D/E r}] Putting, ((1+k)/ Er) V0 = a1, ((1+k)/Er)E = a2, k V0/Er = a3 , we get, Vout(T) = Aoln[{a1eCT+D + a2}/{1 + a3 eCT+D}] + a2}{1 - a3 eCT+D}] |Aoln[{a1eCT+D =Aoln[{a4eCT+D + a5e2(CT+D) + a2 }] (where, a4 = a1 - a2a3, a5 = - a1a3) | Aoln[a5e2(CT+D)] (Since a2, a4 as well as CT + D are very small) = a6+a7T (where a6=Aolna5 + 2AoD, a7=2AoC )…. (12) Equation (12) shows the linear relationship between output voltage Vout(t) and temperature T and thus we can see that the circuit can suitably linearize the voltage output across a PTC thermistor sensor.

5. SPICE model of PTC thermistor: A SPICE model of a PTC thermistor has been developed. In modeling the thermistor, the model of a resistor is created without using a resistor. The voltage across a resistor is produced according to Ohm’s law. In the model, the current is sensed using a voltage source VSENSE. It is set to 0V and hence there is no effect on the output voltage. Another voltage source Vtherm generates the output voltage based on current times the ptc thermistor resistance given by equation (1). To mock up the sensor temperature, a piecewise linear voltage source Vtemp is used. It ramps linearly from 0mV at 0ms to 100mV at 100ms representing the temperature range 00C to 1000C. The subcircuit corresponding to the SPICE model of PTC thermistor is shown in figure 6.

Simulation is carried out using TSPICE software. The operational amplifiers used in the circuit are all CMOS operational amplifiers that provide the facility of lower power dissipation. The specifications of the operational amplifier to be designed are as follows : DC gain (Av) > 5000V/V, Unity gain bandwidth (GB) 5MHz, Load capacitance (CL) 10pF, Slew rate (SR) >10V/Ps, Input common mode range -1 to 2 Volts, Power dissipation (Pdiss) 10V/Ps, Input common mode range -1 to 2 Volts, Power dissipation (Pdiss) =0.625mW, Phase margin 60o . Thus the operational amplifier designed conforms to the design specifications. The frequency response of the operational amplifier is shown in figure 8.

Fig. 8 Frequency response of the operational amplifier

Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID’05) 1063-9667/05 $20.00 © 2005 IEEE

The common mode rejection ratio of the operational amplifier is found to be 37.9db. The circuit diagram of the linearizer is given below:

Fig. 9 Circuit diagram of the linearizer circuit In the linearizer circuit above, the input voltage marked as VIN corresponds to the input of the linearizer and the output voltage marked as VOUT corresponds to the output of the linearizer. The power dissipation of the entire linearizer has been calculated to be as low as 3.125mW in a supply voltage of 5 Volts. The output voltages of the thermistor obtained at various temperatures are provided as inputs to the linearizer. The output voltages of the linearizer obtained by SPICE simulation are compared with the corresponding temperatures. Plotting the temperatures versus linearizer output, we get the graph shown in figure 8:

Fig. 10 Output voltage characteristic of a PTC thermistor sensor cascaded with the proposed linearizer circuit Thus we see a linear temperature voltage relationship of the smart PTC thermistor sensor having the facility of linearization of its output voltage characteristic. Hence, the proposed linearizer circuit can linearize the characteristic of a PTC thermistor sensor. In the same way, it can linearize the characteristic of any sensor with exponential output characteristic.

7. Conclusion: In the paper, a hardware method for linearizing PTC thermistor sensor signals using ASIC design has been developed. The circuit involves a ratio-logarithmic amplifier. The idea of using a logarithmic amplifier based scheme originated from the fact that the linearizing property is inherent to the logarithmic operation, as a result of which logarithmic amplifier based circuits have been used for linearization of sensor output characteristics [9,10]. However, unlike conventional logarithmic amplifier circuits, which suffer from temperature effects, a ratio-logarithmic amplifier have been used providing an effective means of temperature compensation. Further, CMOS circuits have been used as they tend to have a low power dissipation. Further work is going on.

8. References: [1] D. Patranabis and D. Ghosh, ‘Linearization of Transducers through a Generalized Software Technique’, Measurement Science and Technology, Vol. 2, pp. 102105, 1991. [2] D. Patranabis, ‘Sensors and Transducers’, Prentice Hall of India, 2nd Edition,2003 [3] Chao-Shiun Wang and Po-Chiun Huang*, ‘A CMOS Low-IF Programmable Amplifier with Speed-Enhanced DC Offset Cancellation’, SoC Technology Centre, Industrial Technology Research Institute, HsinChu 310, Taiwan and *Dept. of Electrical Engineering, National Tsing Hua University, HsinChu 300, Taiwan. [4] S. Lopez-Buedo , J. Garrido., E. Boemo. ‘Thermal Testing on programmable logic devices’, IEEE ISCAS Conference, Vol. II , pp240-243, Monterey, June 1998. [5] Timo Veijola, ‘Large Signal simulation model for PTC thermistor’, Department of Electrical and Communications Engineering, Helsinki University, 2002. [6] James M. Fiore, ‘Operational Amplifiers and Linear Integrated Circuits- Theory and Application, Jaico Publishing House, 2nd Edition, 2002 [7] B. Lyndon, ‘Log-ratio Circuit with enhanced temperature stability.’, Johnson Space Centre, Texas, 2003. [8] R.Moghimi, ‘ Log-ratio amplifier has six-decade dynamic range.’, Analog Devices, San Jose, CA, 2004 [9] Sourav Kanti Jana, ‘Simulation Studies of LogAmplifier based Lineariser for Thermocouples’, M.Sc. thesis, Jadavpur University, 2003. [10] M. Ortiz, R. A. Radovitzky, E. A. Reppetto, ‘Computations of the exponential and logarithmic mappings and their first and second linearizations.’, International Journal for Numerical Methods in Engineering, 2001. [11] Philip E.Allen, Doughlas R. Holberg, ‘CMOS Analog Circuit Design’, Oxford University Press, 2nd Edition, 2002. [12] Behzad Razavi, ‘Design of Analog CMOS Integrated Circuits’, Tata Mcgraw Hill, 2nd Edition, 2002. [13] Randall L. Geiger, Phillip E. Allen, Noel R. Strader, ‘VLSI Design Techniques for Analog and Digital Circuits’, McGraw Hill International Edition, 1990. [14] Povoa De Varzim, Novotel Vermar, ‘Smart Sensors and MEMS’, International Frequency Sensor Association, 2003.

Proceedings of the 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design (VLSID’05) 1063-9667/05 $20.00 © 2005 IEEE