Two-switch three-phase ac-link dynamic voltage restorer - IEEE Xplore

www.ietdl.org Published in IET Power Electronics Received on 7th November 2011 Revised on 22nd August 2012 doi: 10.1049/iet-pel.2012.0252

ISSN 1755-4535

Two-switch three-phase ac-link dynamic voltage restorer J.C. Rosas-Caro1 F. Mancilla-David2 J.M. Ramirez-Arredondo3 A.M. Bakir 2 1

Research and Graduated Studies Division, Madero City Technological Institute, Calle Juventino Rosas esquina con Calle J. Urueta, Col Los Mangos, Ciudad Madero, Tamaulipas, CP 89440, Me´xico 2 Department of Electrical Engineering, University of Colorado-Denver, North Classroom, RM 2522B, Campus Box 110, P.O. Box 173364, Denver, CO 80217, USA 3 Power Systems Department, Centro de Investigacioń y de Estudios Avanzados del Instituto Politećnico Nacional CINVESTAV Unidad Guadalajara, Av. del Bosque 1145, colonia el Bajió, Zapopan 45019, Jalisco State, Me´xico E-mail: [email protected]

Abstract: This study presents a topology for a pulse width modulated (PWM) three-phase voltage regulator that uses only two driving switches, providing high reliability and making the switching stage simpler and cheaper compared with other available configurations. The proposed topology is suitable for voltage regulation on the distribution power system. It is able to regulate the steady-state voltage and to reject voltage variations such as flicker or sags caused by large motors start. In addition, the compensator features a topology free of energy storage elements. The PWM control is based on dc signals, asynchronous from the grid, simpler than the control used for traditional voltage source converters – it does not require a phase-locked loop, and does not involve trigonometric calculations. As a result of this, the controller can be achieved with an analogue controller or a low-cost microcontroller. The proof of concept is performed with a 220 V three-phase voltage regulator, which is simulated and prototyped in the laboratory.

1

Introduction

Under the rubric of custom power (CP), power electronics bring the promise of providing enhanced reliability and power quality levels to the distribution system [1]. The realisation of power conditioning systems may be divided into two approaches according to their power stage architecture: (i) the dc-link approach, based on either a voltage source converter (VSC) or a current source converter depending on the energy storage device being a capacitor or an inductor, respectively, and (ii) the ac-link approach, based on ac– ac converters without energy storage [2 – 4]. Comparative studies between the two approaches have appeared in the literature, reporting on the various tradeoffs involved in the realisations [5]. The state-of-the-art technology for voltage regulation in the distribution system has been termed dynamic voltage restorer (DVR). The power stage of a DVR includes a dc-link VSC that connects in series with a sensitive load through an injection transformer, providing premium quality voltage to the load of interest [6, 7]. Several ac-link power conditioning systems have been proposed in the literature [8 – 13], where the advantages against their dc-link counterparts have been discussed. A main advantage at the power stage is the operation without energy storage. At the control stage the modulation of ac-link converters is realised with dc signals asynchronous from the grid, which allows for operating without the need of a phase-locked 1754 & The Institution of Engineering and Technology 2012

loop (PLL) and makes the control scheme immune to frequency and phase jumps in the ac grid. A design oriented comparative evaluation between ac- and dc-link power flow series compensators at the transmission level has reported several additional advantages of ac-link compensators, including lower size, cost and power semiconductor rating for the same amount of compensation level [5]. The literature review suggests that ac-link power converters for voltage regulation may be further classified into two main groups: Type 1 – those using an ac-link converter rated at full throughput power [8, 9] and Type 2 – those realised using aclink converters along with injection transformers. In the latter approach the converter is rated at only a fraction of the throughput power [10, 11, 14]. Figs. 1a and b show an example of an ac-link buck converter for each type. Boost as well as buck– boost topologies may also be realised. Indeed, ac-link converters can be derived from the well known dc – dc converter topologies. Efforts for unifying these ideas have appeared in the literature in the context of CP [15], flexible ac transmission systems [16] and as power flow control gateways in complex networks [17]. This paper proposes a novel pulse width modulated (PWM) ac-link converter topology that may perform as a DVR. The topology requires an ac – ac converter with only two driving switches and two injection transformers, and hence belongs to the Type 2 class defined above. In addition, the topology IET Power Electron., 2012, Vol. 5, Iss. 9, pp. 1754–1763 doi: 10.1049/iet-pel.2012.0252

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Fig. 1 Circuit schematic of possible realisations of ac-link converter for voltage regulation a Type 1 b Type 2

features the various properties that make ac-link converters an attractive alternative for the realisation of power conditioning systems. As most ac– ac topologies, the approach proposed here lacks ride through capability because of the absence of

an energy storage device – all the energy required to perform the compensation must be taken from the grid. However, when sags occur additional current will be drawn from the mains.

Fig. 2 Circuit schematic of proposed topology along with typical waveforms IET Power Electron., 2012, Vol. 5, Iss. 9, pp. 1754–1763 doi: 10.1049/iet-pel.2012.0252

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www.ietdl.org The proposed topology can be used to regulate the voltage in important sensitive facilities such as control panels and programmable controllers that are connected near large motors. In addition, it can reject flicker specially in industrial facilities where the start of large motors can cause a decrease of more than 15% in the feeders voltage even with a capacitor banks installed [18]. The rest of the paper is organised as follows. Section 2 introduces the topology along with its modelling and equivalent circuit. Computer simulations are presented in Section 3, followed by the experimental prototyping of the proposed topology in Section 4. Finally, the conclusions of Section 5 close the paper.

2

Converter topology

The power stage of the ac-link converter proposed in this paper is depicted in Fig. 2. The architecture includes a shunt-connected injection transformer (T1), a three-phase capacitor bank (Ci), two four-quadrant switches realised using a diode bridge and an insulated gate bipolar transistors (IGBT) with an anti-parallel diode (S1 , S2) and a series-connected injection transformer (T2). Fig. 2 also illustrates the principle of operation at a glance through typical waveforms. The converter is fed directly from the mains. This voltage is then chopped by the converters at a

duty ratio-controlled adjustable rate and injected back in series with the load providing the means to have a highquality voltage across the load immune to disturbances propagating from upstream of the system. Detailed analysis including mathematical modelling as well as waveform filtering considerations are discussed in the following subsections. 2.1

Mathematical model and equivalent circuit

The shunt-connected transformer T1 feeds the converter and reduces the voltage to a level at which the power semiconductors can safely operate. The three-phase capacitor bank connected to T1’s secondary side is used for stiffness purposes only, and hence the capacitors are small and do not store energy. The voltage across these capacitors depends on the input voltage and the transformer’s turns ratio as ⎡

⎤ ⎡ ⎤ vca (t) va1n1 (t) ⎣ vcb (t) ⎦ = T1 ⎣ vb1n1 (t) ⎦ vcc (t) vc1n1 (t)

(1)

where T1 is also used to the designate the transformer’s turns ratio. The transformer’s output is connected to the switching stage of the converter, which consists in two four-quadrant

Fig. 3 Circuit schematics of resulting topologies according to the switch state a S1 is on and S2 is off b S1 is off and S2 is on 1756


IET Power Electron., 2012, Vol. 5, Iss. 9, pp. 1754–1763 doi: 10.1049/iet-pel.2012.0252

www.ietdl.org transistor is open, no current can circulate. According to the switch state, there are two equivalent circuits for the compensator as shown in Figs. 3a and b. As may be evident from the figures, the pole side of the converter either ‘sees’ the capacitor bank or a short-circuited node. This may be redrawn as illustrated in the circuit schematic of Fig. 4a. The latter figure reveals the switching stage of the converter can be thought of as a three-phase single-pole double-through vector-switching converter (3wSPDT – VeSC) [17], where the poles of the converter are ‘ganged’ together and switch concurrently. A conceptual schematic of a 3wSPDT – VeSC is presented in Fig. 4b. Evidently, [va1 vb1 vc1]T ¼ [vCa vCb vCc]T and [va2 vb2 vc2]T ¼ [0 0 0]T. It is worth noticing the converter complies with the stiffness requirements for proper operation of force-commutated topologies. The throw side of the converter is connected to two voltage-stiff sources and the pole side is connected to a current-stiff source. The throws corresponding to S1 and S2 are made stiff by the capacitor bank and the short-circuit node, respectively. The pole is made stiff by the leakage inductor of T2 and the inductive nature of the load. The transfer matrix of the switching stage may be expressed as ⎡

⎤ ⎡ va2n2 (t) va1n1 (t) ⎣ vb2n2 (t) ⎦ = T1 ⎣ vb1n1 (t) vc2n2 (t) vc1n1 (t)

Fig. 4 Schematics of possible equivalent circuits for the switching stage a Actual equivalent circuit b Abstraction in terms of a VeSC

three-phase PWM-controlled switches. Each of those switches is realised using a diode bridge and one active switch, which operates complimentarily [15]. When a transistor is closed there is a free path for a current in any direction between those three input terminals, and when the

⎤ 0 s (t) 0⎦ 1 s2 (t) 0

(2)

where Si(t) ¼ 1, 0 (i ¼ 1, 2) depending if the corresponding switch is closed or open, respectively. As stated above, the switches are operated complimentarily, that is, when S1 ¼ 1 then S2 ¼ 0 and vice versa. Furthermore, when the switching frequency is sufficiently large, net power transfer arises from the average value of the switched state. As a result of this, the switching states in (2) may be replaced the converter’s duty ratio, say d(t). Considering as well the effect of T2’s turn ration, the overall transfer function of the converter in terms of average (fundamental) quantities may be expressed as ⎡

⎤ ⎡ ⎤ vinja (t) va1n1 (t) ⎣ vinjb (t) ⎦ = T2 d(t)T1 ⎣ vb1n1 (t) ⎦ vinjc (t) vc1n1 (t)

(3)

As it may be evident in (3), the converter’s duty ratio provides the means to synthesise and adjustable amount of injected voltage in order to regulate the load voltage. Following

Fig. 5 Dynamic phasors-based equivalent circuit schematic IET Power Electron., 2012, Vol. 5, Iss. 9, pp. 1754–1763 doi: 10.1049/iet-pel.2012.0252

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www.ietdl.org standard dynamic phasors-based modelling procedures available in the literature [19], the overall transfer function of (3) may be represented by the equivalent circuit of Fig. 5, where voltage/current-controlled sources have been used to model the energy transfer process in the transformers and the switching stage. State variables are easily identified from the figure as the dynamic phasors representing inductor currents and capacitor voltages,

and hence the state-space equations may be formulated. This equivalent circuit along with its state-space formulation may be conveniently utilised for controller design purposes as well as for averaged simulation of power system load flow and dynamic analysis studies. The equivalent circuit also reveals the inclusion of a low-pass filter (LoCo) at the output of the converter. This filter is used for power quality purposes and is discussed in the next subsection.

Fig. 6 Closed-loop regulation a Schematic of compensator with output voltage control b Voltage meter c Regulator response to a 15% voltage sag 1758 & The Institution of Engineering and Technology 2012


www.ietdl.org Table 1

Prototype parameters

System parameters mains load Converter parameters shunt transformer input filter MOSFETs output filter injection transformer

2.2

Vin ¼ 220 V, Fp ¼ 60 Hz R ¼ 161 V, L ¼ 159 mH, SL ¼ 283 VA T1 ¼ 5:1 Ci ¼ 2.2 mF IRFP250, VDS ¼ 200 V, ID ¼ 33 A Lo ¼ 600 mH, Co ¼ 4.7 mF T2 ¼ 1:1

Waveform quality

The preliminary waveforms presented in Fig. 2 clearly show an amount of distortion that may not be acceptable for the voltage regulation of a sensitive load. In order to improve the quality of the injected voltage, a small low-pass filter may be placed at the converter’s output as shown in Fig. 6a. A detailed quantitative analysis of waveform

quality is presented in Section 3, where numerical values of a prototype are introduced. 2.3

Control architecture

The main aim of the topology presented in this paper is the regulation of the load voltage magnitude. A very simple and low-cost control architecture can be implemented. The control stage includes a voltage meter based on the Clarke transformation, a comparator, a proportional-integral (PI) controller and a standard PWM. These components are shown in Fig. 6a. The load voltage is instantaneously sensed by the voltage meter, which produces a signal equal to the instantaneous voltage magnitude at the load. Details of the voltage meter procedure are presented in Fig. 6b. It may be noticed only arithmetic computations are performed. The measured voltage is then compared with the desired voltage at the load. The resulting error is driven to zero by the action of a simple PI controller that synthesises an adequate value for the duty ratio. Finally, a standard modulator is used to generate the converter pulses. In

Fig. 7 Waveform quality assessment at different switching frequency with/without low-pass filter a b c d

Harmonic spectrum of chopped voltage Va2n2 Harmonic spectrum of load voltage Va3n3 Harmonic spectrum of chopped voltage Va4n2 Harmonic spectrum of load voltage Va3n3


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www.ietdl.org comparison to most converter topologies used for voltage regulation, the converter proposed herein does not need a PLL or complex modulation strategies involving trigonometric computations. Indeed, the control stage is very similar to those used in the modulation of traditional dc/dc converters.

3

Case 1: steady-state waveforms

A first simulation study is performed in order to generate characteristic waveforms and validate the theoretical model introduced in the previous section. Results for a simple open-loop simulation at a modest switching frequency of Fs ¼ 1.2 kHz with D ¼ 50% are presented in Figs. 7a and b. As the intent is to generate characteristic waveforms, this case study is implemented without the low-pass filter. Time-domain response along with harmonic spectral analysis are illustrated in Figs. 7a and b for the phase – a converter’s pole and load voltage, respectively. As it may be observed from the time-domain waveforms, the pole voltage features a chopped nature, which rides on top of the Table 2 Duty cycle 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9

va2n2 (t) =

vinja (t) = DT1 va1n1 (t) T2

(4)

Computer simulation

As a first step to validate the topology proposed in this paper, a detailed computer simulation of the circuit presented in Fig. 6a was implemented. The SABER simulation platform was used for this purpose. Fig. 6c shows waveforms of a simulation performed over the circuit shown in Fig. 6a. A complete list of parameters is presented in Table 1. These parameters match the physical quantities associated with the experimental prototype introduced in Section 4, and hence simulated and experimental results may be directly compared. 3.1

load voltage as predicted by the theory. The harmonic spectrum for the pole voltage also validates the predictions made by the average equivalent circuit. According to (3)

THD of chopped and output voltage Chopped voltage THD, %

Output voltage THD, %

302.37 204.18 158.48 124.26 102.52 82.68 66.45 51.72 36.17

6.04 7.57 8.50 8.75 8.92 8.52 7.85 6.83 5.27

and va3n3 (t) = va1n1 (t) + T2 DT1 va1n1 (t)

Evaluating (4) and (5) one obtains Va2n2 ¼ 12.7 V and Va3n3 ¼ 139.7 V, which closely match the results for the fundamental values in the harmonic spectra. Furthermore, both spectra show the characteristic harmonic distribution of PWM waveforms with harmonics occurring at nFs + Fp , with n ¼ 1, 2 etc. In this case, Fs ¼ 1.2 kHz corresponds to the 20th harmonic of Fp ¼ 60 Hz, and hence the harmonics will appear in the sides of the 20th, 60th, 100th, 140th and so on. The behaviour in the total harmonic distortion (THD) index against the duty cycle was evaluated and is presented in Table 2. It may be observed that the behaviour of the output voltage THD is analogous to the buck converter, where maximum voltage and current ripples are obtained with a duty cycle of D ¼ 50%. Thus, the THD at D ¼ 50% can be used as worst-case scenario for filter design purposes. A more realistic case with admissible THD levels is implemented and discussed in the next subsection. Further details on the switching process may be observed in Fig. 8, where the instantaneous voltage and current waveforms for one switch are illustrated. When the switch opens, the current is zero and the blocking voltage of switches is the three-phase rectified voltage from T1 . The blocking voltage is almost constant and corresponds to the peak line-to-line voltage. Thus, neglecting the voltage spike that strongly depends on the physical implementation, and neglecting voltage drops in diodes and transformers, the voltage stress on switches is given by √ Vopen = Vinput T1 2

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(6)

where Vinput is the line-to-line root-mean-square (RMS) input voltage. When the switch is closed the peak current it draws is also almost constant, but equal to the peak value of a phase current in the primary side of transformer T2 . Thus, the peak value of the conducting current may be expressed as √ Iclosed = Iload T2 2

Fig. 8 Voltage and current waveforms of one switch

(5)

(7)

where Iload is the RMS load current. Manufacturers’ datasheets usually provides semiconductor ratings in terms of the average current, which may be computed as dIclosed . Equations (6) and (7) provide the basis for the stress on switches for designing purposes. They suggest the stress on the switches may be manipulated by properly selecting the transformers’ turn ratio, and hence match capacity of commercially available power semiconductors. As a rule of thumb, it is possible to establish that compared with a Type 1 ac-chopper, a Type 2 chopper have T1 times smaller switching losses and T2 times smaller conduction losses. IET Power Electron., 2012, Vol. 5, Iss. 9, pp. 1754–1763 doi: 10.1049/iet-pel.2012.0252

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Fig. 9 Input and load voltage without a low-pass filter and a modest switching frequency consistent with Fig. 2

3.2

Case 2: dynamic performance

This subsection discusses a more realistic case study in order to demonstrate the ability of the proposed topology to regulate the load voltage with adequate dynamic performance and acceptable waveform quality. Towards this end, the switching frequency was set at Fs ¼ 6 kHz and the lowpass filter was added into the circuit. Moreover, the control stage was also included and the desirable load voltage was set at Vref ¼ 220 V. The case study consists in evaluating the response of the voltage regulator to a 15% voltage sag in the input voltage, which may emulate the start of a large motor near the load. Results are presented in Fig. 6c. The top plot shows the three-phase input voltage, where the sag takes place. The IET Power Electron., 2012, Vol. 5, Iss. 9, pp. 1754–1763 doi: 10.1049/iet-pel.2012.0252

two plots immediately below show the load voltage and the response of the compensator. Further details on the dynamic response of the compensator may be observed in the bottom plot. Those traces show the evolution of the input and load voltage magnitudes. It can clearly be seen that the regulator is able to restore the voltage back to its nominal value after the sag occurs. Furthermore, the plots reveal the response is smooth and quick, which definitively validates the compensator performance. Figs. 7c and d show harmonic spectra with the low-pass filter embedded in the converter for the injected voltage and the load voltage, respectively, at the worst-case scenario (D ¼ 50%). It may be seen the voltage distortion across the load was greatly improved, with a THD smaller than 3%, and hence compliant with current power quality standards [20]. 1761


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Fig. 10 Experimental waveforms a Voltage across transistor terminals for different duty cycles b Dynamic response to a 15% voltage sag in the input voltage c Load voltage regulation for two different voltage sags

4

Experimental verification

A laboratory-scaled prototype with similar parameters to those presented in Table 1 was built in order to demonstrate the operation of the proposed voltage regulator. 4.1

Case 1: steady-state waveforms

Fig. 9 illustrates open-loop waveforms at a modest switching frequency and without the low-pass filter for the load voltage along with the input voltage for different values of the converter’s duty cycle. It may be observed the fundamental component of the load voltage takes different values as the duty ratio changes, which validates the converter’s principle of operation. The stress on the switches is illustrated in Fig. 10a, where the instantaneous voltage across one switch is presented for two random values of the duty cycle. It may be seen from the experimental traces the peak blocking voltage corresponds to 1.2(div) × 50 (V/div) ¼ 60 V. On the 1762 & The Institution of Engineering and Technology 2012

other hand, the theoretical prediction of (6) dictates Vopen ¼ 62 V. Therefore the theoretical predictions for switch’s stress may be considered valid. 4.2

Case 2: dynamic performance

The dynamic response of the regulator to 15% voltage sag was also tested experimentally. Results are presented in Fig. 10b. It may be seen the load voltage is practically immune to the voltage dip taking place in the input voltage. Fig. 10c illustrates the ability of the regulator to compensate steady-state voltage sag. This is shown for two different levels. Once again, the experimental waveforms validate the good performance of the regulator.

5

Conclusions

This paper has presented a novel PWM controlled three-phase ac-link voltage regulator based on two active switches and two injection transformers. The topology features several IET Power Electron., 2012, Vol. 5, Iss. 9, pp. 1754–1763 doi: 10.1049/iet-pel.2012.0252

www.ietdl.org advantages in contrast with its dc-link counterparts, including (i) a compact size because of the absence of bulky energy storage capacitors; (ii) high reliability because of a reduced number of active switches; and (iii) a simple control stage based on dc signals. It is noteworthy that the voltage regulator presented here can inject only positive sequence and hence compensate only for balanced disturbances. Nevertheless, the topology can inject negative sequence if the phases at the shunt transformer’s output are swapped [14]. Evidently, both can not be realised simultaneously and thus the converter can inject either positive or negative sequence. Hence, if the topology presented here is thought of as a module, one could develop positive and negative sequence compensator modules and implement a topology to compensate for unbalanced sags as well. This is currently under investigation and will be the subject of a publication in the future.

6

References

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