CORDIC and Taylor Based FPGA Music Synthesizer - IEEE Xplore

CORDIC and Taylor Based FPGA Music Synthesizer Trio Adiono∗ , Vincentius Timothy† , Nur Ahmadi‡ , Aditya Candra§ , Khafit Mufadli¶ Department of Electrical Engineering, School of Electrical Engineering and Informatics Bandung Institute of Technology, Jl. Ganesha No. 10 Bandung, 40132, Indonesia Email: ∗ [email protected], † vincentius [email protected], ‡ [email protected], {§ khafit.fadli, ¶ aditya.candra02}@gmail.com Abstract—Trigonometric functions of sine and cosine play an important role in a wide variety of applications. COordinate Rotation Digital Computer (CORDIC) and Taylor expansion algorithms are commonly used to calculate those functions. This paper presents the architecture of both CORDIC and Taylor algorithms and their implementation for music synthesizer application. All design modules are written in Verilog HDL and simulated using ModelSim tool. The proposed designs are synthesized using Altera Quartus II software and successfully implemented in Altera DE2 FPGA board. The proposed CORDIC design consumes 1750 area and 222.47 MHz maximum frequency, while the proposed Taylor design utilizes 870 area and 94.73 MHz maximum frequency. Based on AT analysis, CORDIC design performs better than Taylor design.

and Taylor based FPGA music synthesizer. The simulation and synthesis results are provided in Section V along with their performance comparison in terms of area and delay. The conclusion is drawn in Section VI. II.

A LGORITHMS

A. CORDIC Algorithm CORDIC is a trigonometry algorithm which can be used to calculate trigonometry and complex number multiplications in a simple way [4]. It uses only simple arithmetic operations involving addition, shifting, and look-up tables (LUTs).

Keywords—CORDIC, Taylor expansion, music synthesizer, FPGA

I.

I NTRODUCTION

Trigonometric functions play an important role in broad range of applications such as communication, digital signal processing, and graphical systems [1]. COordinate Rotation Digital Computer (CORDIC) and Taylor expansion algorithms are two of the many methods used to perform trigonometric computations [2]. The CORDIC algorithm was originally developed by Volder in 1959 [3] to calculate trigonometric relationships in navigation system using a family of linearly converging iteration equation. This paper presents the design and implementation of CORDIC algorithm for music synthesizer application. The performance of proposed CORDIC design is compared with its counterpart, Taylor based design. Taylor series, introduced by Brook Taylor in 1715, is a representation of a function as an infinite sum of terms calculated from the function’ derivatives value at a single point. Two main parameters to measure the performance of each algorithm are area (A) and delay (T ). The area is represented by the number of logic elements and registers, while the delay is calculated by 1 divided by its frequency maximum. Generally, it is desired to have the smallest possible area and delay. The rest of the paper is organized as follows. Section II gives a brief overview of CORDIC algorithm, including rotation and vectoring mode, and Taylor expansion algorithm used to calculate sine and cosine of an arbitrary angle. Section III presents various architectures to implement CORDIC algorithm and Taylor expansion algorithm, and the chosen architecture. Section IV describes the system design for CORDIC

Fig. 1.

Rotation of vector on a two-dimensional plane

As illustrated in Figure 1, the basic principle underlying CORDIC-based computation is obtained from the general equation of rotation at angle θ, which is implemented using iteration where each iteration utilizes a predetermined value of angle θi .      xi+1 cos θi − sin θi xi = yi+1 sin θi cos θi yi    1 − tan θi xi = cos θi (1) tan θi 1 yi    1 1 − tan θi xi = tan θ 1 yi 2 i 1 + tan θi where: xi = the pre-rotated x-position at i-th iteration yi = the initial y-position at i-th iteration xi+1 = the post-rotated x-position at i-th iteration xi+1 = the post-rotated y-position at i-th iteration

c 978-1-4799-8641-5/15/$31.00 2015 IEEE

In order to simplify the hardware implementation, θi is set in such way so that each iteration its value always fulfills tan θi = di 2−i where di is either −1 or +1. It is mandatory for the iteration to begin with i = 0. The value of θi is predetermined such that the tangent operation for each iteration can be replaced by a shift and a sign, which greatly simplifies the used operations. By substituting the tangent value, we can obtain      1 xi+1 1 −di 2−i xi = −i yi+1 yi 1 1 + (di 2−i )2 di 2    −i 1 1 −di 2 xi =√ (2) −i yi 1 1 + 2−2i di 2    1 −di 2−i xi = Ki yi di 2−i 1 where Ki = (1 + 2−2i )−1/2 which can be calculated later after all the iteration calculations have been performed, and expressed as A(n) =

n−1  i=0

Kj =

n−1  i=0

1 √ 1 + 2−2i

(3)

where n is the number of iterations performed (e.g. the iteration is done at i ∈ [0, n − 1]). Not only does each iteration change the x and y values, it also changes the cumulative value of angle. As a summary, the main equations of CORDIC are as follows. xi+1 = xi − di 2−i xi yi+1 = yi + di 2−i yi (4) zi+1 = zi − di tan−1 (2−i )

This implies that at each iteration, yi gets closer to zero, xi increases, and zi cumulative change is recorded simultaneously.  xn = rn = A(n) x20 + y02 (8) yn = 0 −1 zn = θn = θ + tan (y0 /x0 ) B. Taylor Expansion Algorithm Taylor series is a series expansion of a function about a point. Several methods exist for the calculation of Taylor series of a large number of function. One can attempt to use the definition of the Taylor series [5], though this often requires generalizing the form of the coefficient according to a readily apparent pattern. Alternatively, one can use manipulations such as substitution, multiplication or division, addition or subtraction of standard Taylor series to construct the Taylor series of a function, by virtue of Taylor series being power series. A one-dimensional Taylor series is an expansion of a real function f (x) about a point x = a is given by f  (a)(x − a) f  (a)(x − a)2 + + ··· 1! 2! which can be written in the more compact form as fx = f (a) +

fx =

This implies that at each iteration, zi gets closer to zero, xi decreases, and yi increases simultaneously. As a result, at the end of ideal iteration result, the value of xn , yn , and zn becomes as follows. xn = A(n) [x0 cos θ − y0 sin θ] yn = A(n) [x0 cos θ + y0 sin θ] zn = 0

(6)

2) CORDIC Vectoring Mode: The objective of CORDIC vectoring mode is to find the value of polar coordinate (rn , θn ) position of the Cartesian coordinate position (x0 , y0 ), where rn is the magnitude and θn is phase of (x0 , y0 ). To achieve this, the value of y must be reduced to as close as possible to zero. The value of di is determined as  +1 for yi < 0 (7) di = −1 for yi > 0

(10)

If a = 0, the expansion is known as a McLaurin series. Sine and cosine computations of trigonometric function using Taylor series are represented as follows. ∞  (−1)(n) 2n+1 x (2n + 1)! n=0 x5 x7 x9 x3 + − + ··· =x− 3! 5! 7! 9! ∞  (−1)(n) 2n cos (x) = x (2n)! n=0 x4 x6 x8 x2 + − + ··· =1− 2! 4! 6! 8!

sin (x) =

The term of Ki is omitted from xi+1 and yi+1 because it will be aggregately calculated at the end of CORDIC calculation as A(n). 1) CORDIC Rotation Mode: The objective of CORDIC rotation mode is to find the value of (xn , yn ) position after the initial position (x0 , y0 ) is rotated at angle θ. To achieve this, the value of cumulative angle zmust be reduced to as close as possible to zero. The value of di is determined as  +1 for zi > 0 di = (5) −1 for zi < 0

∞  f (n) (a) (x − a)n n! n=0

(9)

(11)

The Taylor expansion algorithm described above is equivalent to CORDIC rotation mode. It has no CORDIC vectoring mode equivalence. III.

A RCHITECTURES

A. CORDIC Architecture The CORDIC algorithm only performs shift and add operations and is therefore easy to implement and resource-friendly. However, a care must be taken with the initialization module and termination module since unexpected values of x0 , y0 and θ can be disastrous for the whole CORDIC algorithm. The overall block diagram of CORDIC implementation is given in Figure 2. There are three main components inside overall CORDIC, which are as follows: 1)

Initialization (cordic init), which detects the quadrant and adjusts the initial value properly.

x(0)

y(0)

z(0) sign(z(0))

xin

16

yin

16

zin

16

cordic _init

xinit

16

yinit

16

zinit

16

xmain 16 cordic _main

ymain 16 zmain 16

cordic _term

xout

16

yout

16

zout

16

>> 0

0th stage

>> 0

const(0)

±

±

x(1)

y(1)

± z(1) sign(z(1))

>> 1

>> 1

const(1)

st

mode

1 stage

1

clk

1

rst

1

± y(2)

.. .

16

mag

± x(2)

.. . x(n-1)

Fig. 2.

y(n-1)

15 stage

>> (n-1)

±

3)

CORDIC Core (cordic main), the actual CORDIC calculations as described in Section II-A Termination (cordic term), which adjusts the final value via quadrant detection and normalization.

The basic CORDIC core architecture is represented in Figure 3. At the beginning of a calculation, the initial values are fed into the register by the multiplexer where the MSB of the stored value in the z-branch determines the operation mode for the adder-subtractor. Signals in the x and y branch pass the shift units and are then added to or subtracted from the unshifted signal in the opposite path. The z branch arithmetically combines the registers values with the values taken from a lookup table (LUT) whose address is changed accordingly to the number of iteration. For iterations, the output is mapped back to the registers before initial values are fed in again and the final sine value can be accessed at the output. A simple finite-state machine is needed to control the multiplexers, the shift distance and the addressing of the constant values. Instead of buffering the output of one iteration and using the same resources again, one could simply cascade the iterative CORDIC, which means rebuilding the basic CORDIC architecture for each iteration. To increase the speed, 16 pipeline registers are employed at the output of each CORDIC stage. These pipeline registers also produce additional delay, but the delay is negligible compared to the speed gained.The pipelined CORDIC core architecture can be seen in Figure 4.

y0

x0

Register

z0

Register >> n

±

y(n)

z(n)

Pipelined CORDIC core architecture

B. Taylor Expansion Architecture Taylor series is an approximation method of some functions and its accuracy depends on the expansion order. To simplify the design, Taylors order has to be as small as possible. To achieve minimum error, sine function uses 7-th order and cosine function uses 8-th order of Taylor series. This design is illustrated in Figure 5. The factorial constant in each order is divided in some stages and then its value has to be stored in ROM. Internal multiplier module is used in every stage to obtain the exact exponential order value. Sine function is resulted from odd exponential part whereas cosine function from even exponential part. The system must be able to retrieve input angle between −π to π radian. In the first stage, the temporary result is obtained from the multiplication of the angle with its self. There will be out of range value in the output and it cannot represent the sine and cosine value if the above design is implemented. This phenomenon occurs because of data overflow in the first stage. Instead of using large value, it will be appropriate by right shifting to make it smaller. The final output has to be shifted to the left to make a deal with the exact value after right shifting the input. Figure 6 shows the modified architecture. The output

…

Register θ

sign(n-1) >> n

×

1/2

×

1/3

×

…

– +

–

sin(θ)

Basic CORDIC core architecture

×

1/7

×

1/8

const(n) +

Fig. 3.

const (n-1)

±

x(n)

Fig. 4.

z(n-1)

sign(z(n-1)) >> (n-1)

Pipeline Registers

.. .

Block diagram of overall CORDIC implementation th

2)

± z(2)

Fig. 5.

Design of general Taylor expansion

1

– +

+

– +

cos(θ)

θ

>>>1

1/2

×

1/3

×

1/4

–

1

×

1/5

×

1/6

–

+

+

+

+

–

+

×

1/7

×

+

1/8

+

+

+

–

+

×

–

+

+

–

+

Pipeline Registers