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A 76 dB 1.7 GHz 0.18 m CMOS Tunable TIA Using Broadband Current Pre-Amplifier for High Frequency Lateral MEMS Oscillators Hossein Miri Lavasani, Member, IEEE, Wanling Pan, Member, IEEE, Brandon Harrington, Member, IEEE, Reza Abdolvand, Member, IEEE, and Farrokh Ayazi, Senior Member, IEEE
Abstract—This paper reports on the design and characterization of a high-gain tunable transimpedance amplifier (TIA) suitable for gigahertz oscillators that use high- lateral micromechanical resonators with large motional resistance and large shunt parasitic capacitance. The TIA consists of a low-power broadband current pre-amplifier combined with a current-to-voltage conversion stage to boost the input current before delivering it to feedback voltage amplifiers. Using this approach, the TIA achieves a constant gain of 76 dB-Ohm up to 1.7 GHz when connected to a 2 pF load at the input and output with an input-referred noise below 10 Hz in the 100 MHz to 1 GHz range. The TIA is fabricated in a 1P6M 0.18 m CMOS process and consumes 7.2 mW. To demonstrate its performance in high frequency lateral micromechanical oscillator applications, the TIA is wirebonded to a 724 MHz high-motional resistance ( unloaded , , pF) and a 1.006 GHz high-parasitic ( unloaded , p , p pF AlN-on-Silicon resonator. The 724 MHz and 1.006 GHz oscillators achieve phase-noise better than dBc Hz and dBc Hz @ 1 kHz offset, respectively, with a floor around dBc Hz. The 1.006 GHz oscillator achieves the highest reported figure of merit (FoM) among lateral piezoelectric micromechanical oscillators and meets the phase-noise requirements for most 2G and 3G cellular standards including GSM 900 MHz, GSM 1800 MHz, and HSDPA.
Q
pA
2
150
87
32 ) 94 154
2000
750
7100
Index Terms—Bandwidth enhancement, broadband amplifier, current amplifier, MEMS, micromechanical resonator, oscillator, phase noise, piezoelectric resonator, sustaining amplifier, transimpedance amplifier.
I. INTRODUCTION
A
FREQUENCY reference oscillator is a pivotal block of any radio transceiver as it significantly affects the performance, size and cost of the transceiver [1]. During the past three decades, reference oscillators have been built based on highquartz crystals [2]. Their superior stability and absolute frequency accuracy has allowed them to be the industry’s preferred
Manuscript received April 23, 2010; revised June 25, 2010; accepted September 13, 2010. Date of publication November 18, 2010; date of current version December 27, 2010. This paper was approved by Guest Editor Kofi Makinwa. H. M. Lavasani, W. Pan, and F. Ayazi are with the School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332 USA (e-mail:
[email protected];
[email protected]). B. Harrington and R. Abdolvand are with the Oklahoma State University, Tulsa, OK 74106 USA. Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/JSSC.2010.2085890
choice for frequency synthesis applications. However, emerging wireless applications have created a number of challenges that can not be addressed by traditional quartz crystal reference oscillators. In multi-gigahertz transceivers [3], the large up-conversion ratio of synthesizers limits the performance of the RF front-end. In addition, higher data-rate transceivers that rely on OFDM-based 3G/4G standards such as HSDPA with stringent error vector magnitude (EVM) specifications demand very low close-to-carrier [4], [5] and far-from-carrier [6] phase-noise; for low frequency crystals, this is only accommodated by a PLL whose loop filter’s 3-dB bandwidth (BW) is shrunk to the point that the filter’s integration on the chip becomes challenging. Another shortcoming is the inherent incompatibility of quartz crystals’ fabrication process with standard CMOS. UHF silicon micromechanical oscillators, on the other hand, offer smaller form factor, higher frequency, and potential integration with ICs while delivering near-crystal phase-noise performance [7]–[9]. Various capacitively-transduced [10], [11] and piezoelectrically-transduced [12] micromechanical resonator technologies have been explored over the past decade to assist in the development of high frequency micromechanical reference oscillators. Unlike high frequency capacitive resonators that suffer k ) from high loss, usually modeled by a large resistance ( called motional resistance [10], and a large DC polarization voltage ( ) [11], piezoelectric resonators exhibit substantially lower motional resistance at comparable frequencies [12], [13]. Recent advances in high-frequency lateral-mode piezoelectric silicon micromechanical resonators have increased their product to a level comparable to quartz crystal [13] but their motional resistance is still significantly higher than the thin-film bulk acoustic resonator (FBAR). The motional resistance can be reduced at the expense of larger transduction area which increases the parasitic capacitance. This high motional resistance combined with the large parasitic capacitance of the resonator complicates the design of low-power oscillators. Since the most effective way to build oscillators based on lateral-mode micromechanical resonators with high motional resistance is to use a high-gain transimpedance amplifier (TIA) that is placed in the positive feedback loop with the resonators [7]–[9], [14], the development of low-power high-gain sustaining amplifiers becomes necessary. Although open-loop architectures have been occasionally used for low phase-noise MEMS oscillators [14], the most
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Fig. 1. (a) Block diagram of the LBAR resonator showing the electrode placement for high-order mode excitation. (b) High-order mode shape of the LBAR. (c) Equivalent lumped electrical model of the LBAR.
popular TIA topology used in MEMS oscillators remains the shunt-shunt feedback TIA as it improves the BW and reduces the input-referred noise [7], [15]. However, the BW improvement is only made possible by lowering the feedback resistor at the expense of gain [8]. Further increase in the gain requires higher power consumption. A number of advanced BW and gain enhancement techniques have been proposed to improve the performance of broadband TIAs [16]–[18]. A large body of literature has focused around the boosted- regulated cascode (RGC) topology as a reliable approach to lower the input impedance of the TIA and hence increase its BW [16], [19]. Other researchers have explored cascade of amplifiers with shunt-shunt local feedback to lessen the impact of inter-stage poles on the frequency response [8], [20]. These techniques, however, are not suitable for low-power low phase-noise micromechanical oscillators; the excessive noise generated by RGC’s input stage deteriorates the phase-noise. In addition, acceptable gain can only be achieved by increasing the number of stages with obvious implication for the power consumption. Using a broadband current amplifier increases the gain while maintaining the BW with little or no extra power. The remainder of this paper is organized as follows. Section II provides an insight into the design and characterization of lateral bulk acoustic resonators (LBAR) that are used throughout this work. The broadband current amplifier topology including the low-power technique used for BW improvement in the amplifier is laid out in Section III. Section IV presents the concept of gain improvement by using the broadband current pre-amplifier introduced in the previous section. In addition, it explains the TIA design methodology and provides theoretical noise analysis. Section IV is followed by experimental results that are partitioned into TIA characterization and interface results with the resonator. Comparisons with state-of-the-art TIAs and high frequency micromechanical oscillators are also listed in this section. Finally, the paper concludes with a brief overview of the TIA performance and its applications in micromechanical oscillators. II. HIGH FREQUENCY LATERAL BULK ACOUSTIC RESONATOR Although still inferior to FBAR in terms of motional resistance, laterally-excited thin-film piezoelectric-on-silicon micromechanical resonators have come a long way from lowprototypes in MHz range [21] to state-of-the-art gigahertz batch-fabricated resonators with Q’s in excess of 7,000 [13], 2-3 larger than FBARs that are widely used as filters in the
receiver front-ends. This section provides a brief overview of the resonator design and characterization. A. Resonator Design The resonators used in this work are from the family of highorder laterally-excited bulk acoustic resonators (LBAR). A simplified schematic of a third-order thin-film piezoelectric-on-silicon LBAR is shown in Fig. 1(a). In these devices the top metal pattern resembles the alternating stress pattern induced in the structure at the targeted high-order resonance mode (Fig. 1(b)). Therefore, the resonance frequency is determined by the distance between two neighboring top electrode fingers (i.e., finger pitch) [22]. The resonator is a two-terminal device, which consists of an energy-transducing thin-film piezoelectric AlN layer sandwiched in between two metal electrodes and stacked on top of a silicon resonant body. The top metal layer is shaped into inter-digitated sense and drive electrodes. The bottom metal is usually considered as the reference and is connected to the global ground. Superior acoustic properties of the silicon layer (e.g., low acoustic loss and high energy density) provide for imand power handling of these resonators [15], [22], proved [23]. The resonance frequency can be approximated by (1) is the finger pitch, and and are the effective where Young’s Modulus and density of the composite structure, respectively. In order to improve the motional resistance at higher frequencies the mode order can be increased [22], [24]. Utilization of high-order modes also provides for the added advantage of less sensitivity to lithographic error. On the other hand, the multi-finger pattern designed on a large structure will excite numerous unwanted near-resonance spurious modes some of which are strong in magnitude relative to the targeted resonance mode. The spurious modes’ proximity promotes the energy transfer from the targeted mode of operation to the neighboring unwanted resonance modes, inevitably broadening the resonance peak and diminishing the . The solution is to use additional anchors at displacement nodes along the frequency setting dimension to add constraints to the vibration pattern to better suppress the spurious modes and hence, improve the [13]. B. Resonator Electrical Model An LBAR resonator operating in a higher-order mode can be modeled as a series-RLC with shunt and feedthrough parasitic
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Fig. 2. Frequency response and SEM view of the 724 MHz AlN-on-Si resonator. Fitted RLC model parameters are: C 146:6 aF.
Fig. 3. Frequency response and SEM view of the 1.006 GHz resonator. Fitted RLC model parameters are: R
capacitance (Fig. 1(c)) [8]. The shunt parasitic capacitance, , pF) and is caused by the overlap of top and bottom is large ( electrodes in addition to pad parasitics. The feedthrough capac, represents the path between the input and output itance, node and is typically very small ( fF) for laterally-excited micromechanical resonators. The components appearing in the , , and are the main factors in deterseries path, mining the resonance frequency and are referred to as motional capacitance, motional inductance, and motional resistance, respectively. For a homogenous single degree of freedom (SDOF) mechanical system such as a LBAR, these parameters are given by [22]
R 750 , L 329 7 H and :
150 , L 168 5 H and C 148 6 aF. :
:
(2) where is the electromechanical coupling coefficient, and and are the effective stiffness and mass of the resonator, respectively. Despite the availability of closed form solutions for the aforementioned parameters, the resonator is generally considered as an empirical value and it would be prudent to use the measured frequency of the resonator to accurately determine the fitted model parameters.
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Fig. 4. (a) Simple CMOS current amplifier; (b) Current amplifier with shunt feedback; (c) Simplified equivalent circuit for the current amplifier for shunt feedback showing the noise sources.
C. Resonator Characterization Two AlN-on-Silicon resonators, one 724 MHz high-motional resistance device (Fig. 2) used to evaluate the TIA performance in the high gain setting, and another 1.006 GHz high-parasitic device (Fig. 3) used to benchmark the TIA performance in the large BW setting, are fabricated and characterized. The resonators are fabricated on silicon-on-insulator (SOI) wafers with 5 m-thick device layer. Both resonators were individually characterized before they are interfaced with the TIA. The frequency response of each resonator is obtained by measuring the calibrated 2-port S-parameters with an Agilent E8364B vector network analyzer (VNA). The fitted model parameters are then extracted from the resonator response. The shunt parasitic capacitance can be approximated by calculating the capacitance from overlap area between top and bottom electrodes. This is usually an underestimate as the fringing fields, due to the sharp edges in the fingers, increase the capacitance (by as much as 50%). As such, the approximate value of for 724 MHz and 1.006 GHz resonators are 2 pF and 3.2 pF, respectively. Moreover the measured data reveals an unloaded 2, 000 and extracted 750 for the 7 and extracted 724 MHz resonator and 150 for the 1.006 GHz resonator.
III. BROADBAND CURRENT AMPLIFIER Despite the availability of the input signal in the form of current, current amplification has received little attention as a gain boosting method in traditionally gain-starved low-power CMOS TIAs. This is due to the relatively-high power consumption of most broadband CMOS current amplifiers. In many topologies, a portion of the static (DC) current passing through the input stage is amplified along with the AC content. This complicates the design of low-power high-gain current amplifiers. Therefore, a low-power BW enhancement technique becomes necessary. A. Frequency Response and BW Enhancement Most broadband CMOS current amplifiers rely on inherently-broadband diode-connected topologies such as the current mirror to maintain high BW [25] (Fig. 4(a)). In addition, the current mirror topology brings an added advantage to the TIA as it can be easily combined with the current-to-voltage conversion stage; the output current can be passed through a resistive load of appropriate size to convert it to voltage. While the input resistance of the current mirror, which is proof the input transistor, is acceptable for most portional to low-frequency applications, even in the presence of large shunt
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parasitic capacitance, the BW requirement imposed by gigahertz resonators puts a strain on the power consumption. To reduce the power consumption, shunt feedback is applied to the input stage resulting in a modified version of the inherently-low input resistance current-mirror topology (Fig. 4(b)). The equivalent circuit of Fig. 4(c) helps in determining the frequency response of the current amplifier. The body effect is nearly cancelled by shorting the bulk terminal of every MOS device to its source. Neglecting all parasitic capacitance of the , MOS transistors except the larger gate-source capacitance, the transfer function of the current amplifier can be approximated by:
(3) where is the drain-source resistance of are transconductances of , , and and are defined as:
and , , , respectively.
(4) where , , and are the drain-source resistances of , , and , and , , and are the gate-source , , and , respectively. represents capacitances of the input capacitive load to the current amplifier. From (3), it is clear that the current amplifier is a multi-pole system with the dominant pole associated with the input terminal. In the absence of channel length modulation effects, the midband current gain can be derived by simplifying (3): (5) where is the ratio of to . The current gain is very close to the gain of a current mirror without the feedback. This shows that the shunt feedback does not degrade the gain. Similarly, the input impedance of the current amplifier with shunt feedback is given by:
(6) , the midband input resistance Neglecting the effect of small where the effect of phase shift due to the parasitic and load capacitances is negligible can be approximated by: (7) where , , and are drain-source conductance of , , and , respectively. Expression (7) shows that the input as resistance is reduced by a factor comparable to the gain of promised by shunt feedback theory. Due to the inherently-large
Fig. 5. Comparison of the AC response of the current amplifier with shunt feedback with a simple current amplifier w/o shunt feedback.
drain-source resistance of the MOS transistor, a pMOS transistor with relatively-low power consumption that yields a small transconductance can substantially lower the input impedance of the current amplifier. Fig. 5 compares the simulated AC current gain and input impedance of the two current amplifiers shown in Fig. 4 with similar power consumption; in the current amplifier with shunt feedback, a small portion of the input stage current flows into the feedback path to improve the BW. The BW is extended by as much as 70% with the same input capacitive load while the gain has remained roughly the same (the gain difference is around 0.5 dB); moreover, the in-band ( dB ) input impedance is reduced by more than 2 to less than 50 . Less than expected improvement in the BW can be explained by . the additional parasitic contribution from B. Noise Analysis For large , (3) states that the dominant pole appears at the coming from input of the TIA. In addition, due to the large MHz), the resonator, at sufficiently high frequencies ( the loading due to impedance can . With this information, be approximated by the noise analysis can be simplified by neglecting the effect of and . The simplified model, (Fig. 4(c)) shows that the input-referred current noise of the TIA can be found in three and are directly added to steps; the noise currents of and its load resistor, , are the input. The noise current of readily available at the output node. They can be referred back to the input when divided by the current gain of the amplifier. Therefore, the problem is reduced to finding the input-referred and . Considering contribution of the noise currents of Fig. 4(c) and eliminating all noise sources except those of and , the output noise can be approximated by (8), shown and are the at the bottom of the next page, where and and can be approximated drain noise currents of the by
(9)
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Fig. 6. Schematic diagram of the TIA with current pre-amplification stage (Biasing is not shown).
where is the noise coefficient and is equal to 2/3 in longchannel regime. Short-channel effects increase by a factor of 2 to 4 [26], [27]. Dividing (8) by the current gain gives the and : input-referred current noise contribution due to
(10) Using superposition, it is possible to find the noise contribution from other transistors: (11) where and are the input-referred curand , and and , rent noise contributions from respectively. These current noise contributions can be approximated by
(12)
From (11), it is evident that the major contributing factors to and the input-referred noise are the noise current from since their noise current is directly added to the input noise. The combination of these two noise sources, alone, is more than 40% Hz). However, of the theoretical calculated value ( 5 further analysis of (8) determines that the second most imporrather than tant contributing noise source is the noise from . This is due to the larger transconductance, , and extra experiences before amplification that the noise current from reaching the output. This provides the designer with a flexibility to minimize the power consumption without significant impact can on the input-referred noise. The noise contribution from . Increasing the length of helps be lowered by increasing reduce the effect of channel-length modulation that negatively impacts its drain-source resistance. IV. TIA WITH CURRENT PRE-AMPLIFIER The broadband current amplifier designed in Section III can be used to realize a low-power high-gain TIA. Fig. 6 shows the TIA block diagram and schematic. The TIA consists of 3 sections: a current pre-amplifier that is combined with a current-to-voltage conversion stage, voltage amplifiers and a 50 buffer.
(8)
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The current amplifier is used as the first stage of the TIA to boost the input current signal before converting it to the voltage ratio of to domain. The current gain is set by the ( ). To save power, the current-to-voltage conversion stage is combined with the output stage of the current amplifier. The is mirrored into current flowing through the drain of and passed through a properly-sized resistive load to produce a voltage. Using small resistors ensures minimal effect on BW. mW. The transThe power consumption of the first stage is impedance gain in the first stage can be written as:
, respectively. Replacing the RC “ ” network with a pure , is reduced to: resistive feedback,
(13)
(18)
Since the midband current gain is approximated by “ ”, the transimpedance gain is equal to:
The output buffer is a broadband 50 -matched CS stage to maximize the power transfer to the 50 input of the measurement equipment. The power matching, however, comes at the expense of larger noise as the current noise of the resistor is inversely proportional to its resistance value. Fortunately, since the drain-source resistance of the nMOS appears in parallel with the load resistance, the 50 constraint can be relaxed. Proper sizing of the nMOS transistor can accommodate a sufficiently large resistive load for optimum gain and BW performance.
(14) The voltage amplifier section consists of two common source (CS) stages that form a modified Cherry-Hooper with gain tuning in the second stage [28]. The choice of CS over other higher gain topologies such as cascode is to achieve higher output swing, which helps improve the TIA linearity. Shunt-shunt feedback reduces the input and output impedance of the last stage, which in turn, helps increase the BW by pushing the poles to higher frequency. Using a tunable pMOS resistor in the feedback network, improves the linearity, lowers the noise compared to a nMOS resistor, and makes the TIA capable of interfacing with a variety of resonators with different motional resistance. The shunt-shunt resistive feedback is replaced with an RC “ ” network to create a zero whose frequency can be tuned for pole cancellation:
(17) For small :
and large
,
can be further simplified to
V. EXPERIMENTAL RESULTS Since the TIA is intended for use in micromechanical oscillators, both the standalone and interface test results are necessary. Therefore, in addition to the traditional performance metrics such as the gain, noise and linearity, the TIA should be interfaced with high frequency micromechanical resonators that are representative of those in the intended frequency range. Therefore, this section is partitioned into two parts. A. TIA Standalone Measurement Results
(15) where is the equivalent resistance of . Complete pole cancellation without disturbing the gain of the last stage requires the capacitor and at least one of the resistors are made variable; however, since the first stage delivers high gain, the focus in the last stage is tilted toward preserving the BW. As such, the widely tunable “ ” network with a pair of variable resistor and capacitor is traded off with a less complex architecture that only uses a variable resistor. Neglecting all capacitances except , the output resistance, , can be approximated by (16) at the bottom of the page, where , , , and are the drain-source resistances , , , and , and is the transconductance of of
The TIA is fabricated in a 0.18 m 1P6M CMOS process and consumes around 4.8 mA from 1.5 V supply. The fabricated chip measures 650 m 500 m (Fig. 7). To obtain the frequency response of the TIA, two sets of S-parameters, one for maximum and the other for minimum gain, were measured using an RF probe station connected to an Agilent E8564B VNA. The S-parameters are then imported into ADS and interfaced with an ideal AC current source with 2 pF capacitive load that represents the shunt parasitic capacitance of the resonator (Fig. 8(a)). Gain larger than 76 dB with GHz is achieved (Fig. 8(b)). The phase-shift of the TIA is also shown (Fig. 8(c)). The result is in good agreement with the simulation. The gain can be tuned down to 64 dB with BW greater than 2.1 GHz. Replacing the 2 pF load with a
(16)
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Fig. 7. The micrograph of the die fabricated in 0.18 m 1P6M CMOS process and interfaced with the 724 MHz AlN-on-Si resonator. The resonator dimensions are less than 500 m 300 m (including the pads). The absence of on-chip inductors has reduced the IC area to 650 m 500 m.
2
2
photo-diode ( 500 fF), the BW can be extended to 2.5 GHz with gain around 76 dB . To measure the input-referred noise of the TIA, the input is connected to ground through a 2 pF capacitor that emulates the shunt parasitic loading of the resonator. The gain is set to maximum and the output signal is recorded from 10 MHz to 5 GHz with an Agilent E4407C spectrum analyzer. Due to the very small BW of the resonators, spot noise at a particular frequency is a more relevant performance metric than the average noise (Fig. 9) [29]. Optimization of input transistor W/L along and current sources with the reduction in the noise of Hz in have yielded a measured input-referred noise 10 the 100 MHz to 1 GHz which is reasonably close to the simulated performance. The excessive noise at higher frequency ( GHz) is due to the gate-induced current noise of MOSFET whose power spectral density (PSD) increases with frequency and is not accurately estimated by BSIM3 model used here. Due to the large power handling of AlN-on-Si resonators [15], the oscillation power is primarily set by the nonlinearity of the TIA. As such, the dynamic range and gain compression of the TIA have direct impact on the oscillator performance. The use of relatively wide-swing CS with feedback in the third stage has pushed the maximum swing, which directly influences the
Fig. 8. (a) Simplified schematic of the setup used to find TIA transfer function, (b) transimpedance gain, (c) phase response of the TIA with 2 pF capacitive load.
overload current, beyond 0.62 . Considering the input-reHz in the 100 MHz to 1 GHz, the ferred noise of 10 TIA achieves a remarkably high dynamic range of 131 dB in this range. To obtain the 1-dB compression point ( dB ), the S-parameters in the maximum gain setting are measured when to . The the input power is varied from input-referred (after 10 dB adjustment due to the reflecdB . The BW is only reduced by 8% to 1.6 GHz tion) is (Fig. 10). The linearity is improved due to the use of a low-gain
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TABLE I PERFORMANCE COMPARISON OF THE STATE-OF-THE-ART CMOS TIAS
is the gain bandwidth product of the TIA and where is the static power dissipated in the TIA. When interfaced with a photo-diode ( 500 fF), the TIA achieves 2190 GHz mW (GBW per DC power) which is the highest FoM among GHz. the 0.18 m TIAs with B. Interface Results
Fig. 9. Measured and simulated input-referred noise of the TIA with 2 pF input load.
Fig. 10. Large-signal gain and BW behavior of the TIA with 2 pF capacitive load. The input power is varied from 20 dBm to 10 dBm while gain and BW is monitored. P dB (after 10 dB adjustment due to the reflection) is around 22 dBm. The BW is reduced by 0.14 GHz at P = 22 dBm.
0
0
0
0
stage with shunt-shunt feedback in the amplifier. Table I compares the TIA performance with state-of the-art 0.18 m CMOS TIAs [30]–[33]. For a fair comparison (Table I), it is beneficial to use a widely-accepted figure of merit (FoM) for TIA performance [34]: (19)
To measure the closed-loop performance of the TIA when used in the oscillator, the TIA is wirebonded to the 724 MHz and 1.006 GHz AlN-on-Si LBARs presented in Section II. Both resonators are small, measuring less than 500 m 300 m (including the pads). These resonators are a good representation of the widely-varying motional resistance and shunt parasitic capacitance of the resonators as they cover the two extreme ends of the spectrum. The 724 MHz resonator exhibits a large motional resistance of around 750 while the shunt parasitic capacitance of the 1.006 GHz resonator is as large as 3.2 pF. Both 724 MHz and 1.006 GHz resonators are interfaced with set the TIA when operating under similar conditions with to 1.5 V. The oscillation at 724 MHz and 1.006 GHz starts with mW and mW, and grows to and , respectively (Fig. 11). These power levels are beyond the dB of the TIA suggesting that in addition to the TIA nonlinearity, the resonator power handling is a contributing factor to limiting the oscillation power. The 724 MHz spectrum is clearly wider than the 1.006 GHz, suggesting worse close-to-carrier phasenoise. The phase-noise measurement is done in air with an Agilent E5500 phase-noise analyzer system. The 724 MHz oscillator dBc Hz at 1 kHz offset. Owing phase-noise reaches below to its higher , the phase-noise of 1.006 GHz oscillator reaches dBc Hz at 1 kHz offset; showing between 7 to 12 dB improvement in close-to-carrier performance over the 724 MHz oscillator (Fig. 12). Although the output power of the 1.006 GHz oscillator is higher its phase-noise floor is only slightly imdBc Hz. This is partially due proved by around 2 dB to to the higher TIA noise at 1.006 GHz compared to 724 MHz which partially offsets its higher output power. There are four regions with different slopes visible in the region, region and the flat region. phase-noise plot: , appears at freThe 4th region whose slope is greater than quencies very close to the carrier and is less pronounced. The larger slope is an indication for contribution from other noise sources that originate from the micromechanical resonator [7], [35]. Due to the large flicker noise corner of the CMOS TIA, the region is almost completely masked.
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Fig. 11. Output spectrum of (a) 724 MHz and (b) 1.006 GHz AlN-on-Si oscillators.
TABLE II PERFORMANCE COMPARISON OF THE STATE-OF-THE-ART PIEZOELECTRICALLY-TRANSDUCED MICROMECHANICAL OSCILLATORS
For a more accurate performance comparison with state-ofthe-art micromechanical oscillators (Table II), a standard FoM for the oscillator is used [12]:
(20)
Fig. 12. Measured output spectrum and phase-noise performance of the 1.006 GHz oscillator. The SEM view of the 1.006 GHz resonator is also presented. The close-to-carrier phase-noise is improved 7 to 12 dB when compared to 724 MHz oscillator. The phase-noise masks for GSM and HSDPA are added to prove that the 1.006 GHz oscillator meets the stringent phase-noise specifications required for these standards.
where is the carrier frequency, is the offset frequency is the power dissipation in millifrom the carrier, watts, and is the phase-noise at . The calculated FoM for both MEMS oscillators is excellent; however the 1.006 GHz oscillator achieves an exceptionally-high FoM at 1 kHz that is the highest reported for laterally-excited piezoelectric micromechanical oscillators. Optimizing the phase-noise performance of a MEMS oscillator requires a reasonably-accurate analytical phase-noise model. The first-order linear time-invariant (LTI) classical
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phase-noise model [35] provides a reasonable estimate for the phase-noise of a micromechanical oscillator:
Research Center for fabrication assistance, and the reviewers for valuable comments and suggestions.
REFERENCES (21) where is the offset frequency, is the flicker noise corner frequency, is the oscillation frequency, is an empirical parameters related to the noise of the amplifier, and is the oscilis the loaded of the resonator and is given lation power. by: (22) and are the input and output resistances of the where TIA, respectively. In this model, the impact of amplifier finite input and output impedance on the of the resonator, called -loading, is considered [8]. Minimizing the input and output , a posiresistance of the TIA has helped in maximizing the tive development for close-to-carrier phase-noise performance. However, the predicated phase-noise is still largely dependent on the empirical parameters such as F and is heavily influenced by the phase-shift from shunt capacitors, not accounted for in this model. VI. CONCLUSIONS This paper presented the design and implementation of a lowpower high-gain 0.18 m CMOS TIA that is intended for high frequency lateral micromechanical oscillators. The TIA uses a broadband current pre-amplifier with shunt feedback for gain boosting with very little penalty on power consumption. This topology has been instrumental in pushing the transimpedance gain above 76 dB up to 1.7 GHz in the presence of a 2 pF capacitive load with power consumption around 7.2 mW, demonstrating the highest reported FoM among 0.18 m CMOS TIAs with similar BW. The input-referred current noise of the TIA is Hz in the 100 MHz to 1 GHz range measured below 10 with a 2 pF input capacitive load. The use of feedback has improved the linearity of the TIA such that dB of better than is achieved. The performance of the TIA when used as a sustaining amplifier for high frequency lateral MEMS resonators is tested by interfacing the TIA with 724 MHz and 1.006 GHz AlN-on-Si resonators. The output spectrum and phase-noise of both oscillators are monitored. The 1.006 GHz phase-noise measures dBc Hz which is about 7 dB better than that of the 724 MHz oscillator. The far-from-carrier performance, however, is only improved by around 2 dB. This is partly due to the higher TIA noise. Finally, to better understand the phase-noise of lateral micromechanical oscillators, a first-order LTI phase-noise model that considered the effect of -loading on the phasenoise performance is presented. ACKNOWLEDGMENT The authors wish to thank Integrated Device Technology for supporting this work, the staff at Georgia Tech Microelectronics
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+90 dBm
N
Q
16
LAVASANI et al.: A 76 dB
1.7 GHZ 0.18 m CMOS TUNABLE TIA USING BROADBAND CURRENT PRE-AMPLIFIER
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p
1
Hossein Miri Lavasani (S’99–M’10) was born in 1979 in Tehran, Iran. He received the B.S. degree in electrical engineering from Sharif University of Technology, Tehran, Iran, the M.S. degree from Arizona State University, Tempe, and the Ph.D. degree from the Georgia Institute of Technology, Atlanta, GA, in 2001, 2003, and 2010, respectively. From 2003 to 2004, he was with Medtronic Microelectronics Center, Phoenix, AZ, as an IC design engineer where he was responsible for developing logic and mixed-signal circuits for microcontroller units used in pacemakers. His Ph.D. research focused on the low-power low-noise interface circuit design and characterization for high-frequency micromechanical oscillators. In 2010, he joined Avago Technologies Inc., San Jose, CA, as an analog IC design engineer in the R&D group in charge of design and characterization of high-speed broadband analog CMOS and BiCMOS circuits for 10 Gbps+ integrated optical transceivers.
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Wanling Pan (S’04–M’06) was born in 1980. He received the B.E. degree in electronic engineering from Tsinghua University, China, in 2000, and the Ph.D. degree in electrical engineering from the Katholieke Universiteit Leuven, Belgium, in 2006. From 2006 to 2009, he was a postdoctoral fellow at the School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA. He is currently with the Integrated Device Technology Inc., San Jose, CA. His research interests include the design, fabrication and characterization of MEMS devices, with focus on micro-resonators and filters. Brandon Harrington (M’08) was born in Buffalo, NY. He received the B.S. degree in computer engineering and the M.S. degree in electrical and computer engineering from the Georgia Institute of Technology, Atlanta, GA, in 2005 and 2008, while working as a student assistant for cleanroom operations at the Pettit Microelectronics Research Center from 2000 until 2008. He is currently pursuing the Ph.D. degree in electrical engineering at Oklahoma State University, Tulsa, OK. His research focus includes thin-film piezoelectric-on-silicon micromechanical resonators for oscillator circuits. Mr. Harrington was a recipient of Oklahoma State’s Distinguished Graduate Fellowship in 2010. Reza Abdolvand (S’02–M’09) received the B.S. and M.S. degrees in electrical engineering from Sharif University of Technology, Tehran, Iran, in 1999 and 2001, respectively. He then joined the Georgia Institute of Technology, Atlanta, GA, in 2002, where he received the Ph.D. degree in the School of Electrical and Computer Engineering in 2008. He is now with the School of Electrical and Computer Engineering at Oklahoma State University, Tulsa, OK, as an Assistant Professor. His research interests lie in the area of micro/nano-electromechanical systems with a special focus on design, fabrication, and characterization of integrated micro-resonators with applications in RF circuits and resonant sensors. He is an inventor on four issued patents and three patent applications in the field of micro-machining techniques and resonant micro-devices. Farrokh Ayazi (S’96–M’00–SM’05) received the B.S. degree in electrical engineering from the University of Tehran, Iran, in 1994 and the M.S. and Ph.D. degrees in electrical engineering from the University of Michigan, Ann Arbor, in 1997 and 2000, respectively. He joined the faculty of the Georgia Institute of Technology, Atlanta, GA, in December 1999, where he is currently a Professor in the School of Electrical and Computer Engineering. His research interests are in the areas of integrated micro- and nano-electromechanical resonators, Interface IC design for MEMS and sensors, RF MEMS, inertial sensors, and microfabrication techniques. He is the Co-Founder and Chief Technology Officer (CTO) of Qualtré Inc., a spin-out from his research Laboratory that commercializes multi axis bulk-acoustic-wave (BAW) silicon gyroscopes and multi-degrees-of-freedom inertial sensors for consumer electronics and personal navigation systems. Prof. Ayazi is a 2004 recipient of the NSF CAREER Award, the 2004 Richard M. Bass Outstanding Teacher Award (determined by the vote of the ECE senior class), and the Georgia Tech College of Engineering Cutting Edge Research Award for 2001–2002. He is an editor for the IEEE/ASME JOURNAL OF MICROELECTROMECHANICAL SYSTEMS. He served on the technical program committee of the IEEE International Solid State Circuits Conference (ISSCC) for six years (2004–2009). He and his students won the best paper awards at the IEEE International Frequency Control Symposium in 2010 and IEEE Sensors conference in 2007.
